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https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
This patch fixes whitespace so that a future patch is easier to read.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> Thanks, Myles git-svn-id: svn://coreboot.org/repository/coreboot-v3@953 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Myles Watson
parent
7e654ac7a0
commit
7bc7f67bfb
1 changed files with 64 additions and 64 deletions
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@ -1,5 +1,5 @@
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/*
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* K8 northbridge
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* K8 northbridge
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* This file is part of the coreboot project.
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* Copyright (C) 2004-2005 Linux Networx
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* (Written by Eric Biederman <ebiederman@lnxi.com> and Jason Schildt for Linux Networx)
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@ -54,14 +54,14 @@ unsigned int amdk8_nodeid(struct device * dev);
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static unsigned int amdk8_scan_chain(struct device * dev, unsigned nodeid, unsigned link, unsigned sblink, unsigned int max, unsigned offset_unitid)
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{
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u32 link_type;
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int i;
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u32 busses, config_busses;
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unsigned free_reg, config_reg;
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unsigned ht_unitid_base[4]; // here assume only 4 HT device on chain
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unsigned max_bus;
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unsigned min_bus;
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unsigned max_bus;
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unsigned min_bus;
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unsigned max_devfn;
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printk(BIOS_SPEW, "amdk8_scan_chain\n");
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dev->link[link].cap = 0x80 + (link *0x20);
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@ -79,7 +79,7 @@ static unsigned int amdk8_scan_chain(struct device * dev, unsigned nodeid, unsig
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return max;
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}
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/* See if there is an available configuration space mapping
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* register in function 1.
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* register in function 1.
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*/
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free_reg = 0;
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for(config_reg = 0xe0; config_reg <= 0xec; config_reg += 4) {
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@ -89,7 +89,7 @@ static unsigned int amdk8_scan_chain(struct device * dev, unsigned nodeid, unsig
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free_reg = config_reg;
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continue;
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}
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if (((config & 3) == 3) &&
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if (((config & 3) == 3) &&
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(((config >> 4) & 7) == nodeid) &&
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(((config >> 8) & 3) == link)) {
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break;
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@ -99,7 +99,7 @@ static unsigned int amdk8_scan_chain(struct device * dev, unsigned nodeid, unsig
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config_reg = free_reg;
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}
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/* If we can't find an available configuration space mapping
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* register skip this bus
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* register skip this bus
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*/
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if (config_reg > 0xec) {
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return max;
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@ -110,36 +110,36 @@ static unsigned int amdk8_scan_chain(struct device * dev, unsigned nodeid, unsig
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* so we set the subordinate bus number to 0xff for the moment.
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*/
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#if SB_HT_CHAIN_ON_BUS0 > 0
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// first chain will on bus 0
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// first chain will on bus 0
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if((nodeid == 0) && (sblink==link)) { // actually max is 0 here
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min_bus = max;
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}
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min_bus = max;
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}
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#if SB_HT_CHAIN_ON_BUS0 > 1
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// second chain will be on 0x40, third 0x80, forth 0xc0
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else {
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min_bus = ((max>>6) + 1) * 0x40;
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}
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max = min_bus;
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#else
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//other ...
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else {
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min_bus = ++max;
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}
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#endif
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else {
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min_bus = ((max>>6) + 1) * 0x40;
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}
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max = min_bus;
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#else
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//other ...
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else {
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min_bus = ++max;
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}
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#endif
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#else
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min_bus = ++max;
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min_bus = ++max;
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#endif
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max_bus = 0xff;
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max_bus = 0xff;
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dev->link[link].secondary = min_bus;
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dev->link[link].subordinate = max_bus;
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dev->link[link].secondary = min_bus;
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dev->link[link].subordinate = max_bus;
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/* Read the existing primary/secondary/subordinate bus
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* number configuration.
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*/
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busses = pci_read_config32(dev, dev->link[link].cap + 0x14);
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config_busses = f1_read_config32(config_reg);
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/* Configure the bus numbers for this bridge: the configuration
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* transactions will not be propagates by the bridge if it is
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* not correctly configured
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@ -151,22 +151,22 @@ static unsigned int amdk8_scan_chain(struct device * dev, unsigned nodeid, unsig
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pci_write_config32(dev, dev->link[link].cap + 0x14, busses);
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config_busses &= 0x000fc88;
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config_busses |=
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config_busses |=
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(3 << 0) | /* rw enable, no device compare */
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(( nodeid & 7) << 4) |
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(( link & 3 ) << 8) |
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(( nodeid & 7) << 4) |
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(( link & 3 ) << 8) |
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((dev->link[link].secondary) << 16) |
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((dev->link[link].subordinate) << 24);
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f1_write_config32(config_reg, config_busses);
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/* Now we can scan all of the subordinate busses i.e. the
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* chain on the hypertranport link
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* chain on the hypertranport link
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*/
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for(i=0;i<4;i++) {
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ht_unitid_base[i] = 0x20;
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}
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if (min_bus == 0)
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if (min_bus == 0)
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max_devfn = (0x17<<3) | 7;
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else
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max_devfn = (0x1f<<3) | 7;
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@ -204,53 +204,53 @@ static unsigned int amdk8_scan_chain(struct device * dev, unsigned nodeid, unsig
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static unsigned int amdk8_scan_chains(struct device * dev, unsigned int max)
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{
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unsigned nodeid;
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unsigned link;
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unsigned sblink = 0;
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unsigned nodeid;
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unsigned link;
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unsigned sblink = 0;
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unsigned offset_unitid = 0;
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nodeid = amdk8_nodeid(dev);
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nodeid = amdk8_nodeid(dev);
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printk(BIOS_DEBUG, "amdk8_scan_chains\n");
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if(nodeid==0) {
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sblink = (pci_read_config32(dev, 0x64)>>8) & 3;
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if(nodeid==0) {
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sblink = (pci_read_config32(dev, 0x64)>>8) & 3;
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#if SB_HT_CHAIN_ON_BUS0 > 0
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#if ((HT_CHAIN_UNITID_BASE != 1) || (HT_CHAIN_END_UNITID_BASE != 0x20))
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offset_unitid = 1;
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#endif
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// do southbridge ht chain first, in case s2885 put southbridge chain (8131/8111) on link2,
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offset_unitid = 1;
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#endif
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// do southbridge ht chain first, in case s2885 put southbridge chain (8131/8111) on link2,
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// but put 8151 on link0
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max = amdk8_scan_chain(dev, nodeid, sblink, sblink, max, offset_unitid );
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max = amdk8_scan_chain(dev, nodeid, sblink, sblink, max, offset_unitid );
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#endif
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}
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}
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for(link = 0; link < dev->links; link++) {
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for(link = 0; link < dev->links; link++) {
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#if SB_HT_CHAIN_ON_BUS0 > 0
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if( (nodeid == 0) && (sblink == link) ) continue; //already done
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#endif
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offset_unitid = 0;
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#if ((HT_CHAIN_UNITID_BASE != 1) || (HT_CHAIN_END_UNITID_BASE != 0x20))
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#if SB_HT_CHAIN_UNITID_OFFSET_ONLY == 1
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#if SB_HT_CHAIN_UNITID_OFFSET_ONLY == 1
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if((nodeid == 0) && (sblink == link))
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#endif
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offset_unitid = 1;
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#endif
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max = amdk8_scan_chain(dev, nodeid, link, sblink, max, offset_unitid);
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}
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}
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return max;
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return max;
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}
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#warning document this unreadable function reg_useable
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static int reg_useable(unsigned reg,
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static int reg_useable(unsigned reg,
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struct device * goal_dev, unsigned goal_nodeid, unsigned goal_link)
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{
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struct resource *res;
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unsigned nodeid, link;
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int result;
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res = 0;
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#warning fix hard-coded 8 in for loop.
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#warning fix hard-coded 8 in for loop.
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for(nodeid = 0; !res && (nodeid < 8); nodeid++) {
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struct device * dev;
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dev = __f0_dev[nodeid];
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@ -263,7 +263,7 @@ static int reg_useable(unsigned reg,
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result = 2;
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if (res) {
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result = 0;
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if ( (goal_link == (link - 1)) &&
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if ( (goal_link == (link - 1)) &&
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(goal_nodeid == (nodeid - 1)) &&
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(res->flags <= 1)) {
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result = 1;
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@ -330,7 +330,7 @@ static struct resource *amdk8_find_mempair(struct device * dev, unsigned nodeid,
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static void amdk8_link_read_bases(struct device * dev, unsigned nodeid, unsigned link)
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{
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struct resource *resource;
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/* Initialize the io space constraints on the current bus */
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resource = amdk8_find_iopair(dev, nodeid, link);
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if (resource) {
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@ -340,7 +340,7 @@ static void amdk8_link_read_bases(struct device * dev, unsigned nodeid, unsigned
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resource->gran = log2c(HT_IO_HOST_ALIGN);
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resource->limit = 0xffffUL;
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resource->flags = IORESOURCE_IO;
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compute_allocate_resource(&dev->link[link], resource,
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compute_allocate_resource(&dev->link[link], resource,
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IORESOURCE_IO, IORESOURCE_IO);
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}
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@ -353,8 +353,8 @@ static void amdk8_link_read_bases(struct device * dev, unsigned nodeid, unsigned
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resource->gran = log2c(HT_MEM_HOST_ALIGN);
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resource->limit = 0xffffffffffULL;
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resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
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compute_allocate_resource(&dev->link[link], resource,
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IORESOURCE_MEM | IORESOURCE_PREFETCH,
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compute_allocate_resource(&dev->link[link], resource,
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IORESOURCE_MEM | IORESOURCE_PREFETCH,
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IORESOURCE_MEM | IORESOURCE_PREFETCH);
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}
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@ -367,8 +367,8 @@ static void amdk8_link_read_bases(struct device * dev, unsigned nodeid, unsigned
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resource->gran = log2c(HT_MEM_HOST_ALIGN);
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resource->limit = 0xffffffffffULL;
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resource->flags = IORESOURCE_MEM;
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compute_allocate_resource(&dev->link[link], resource,
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IORESOURCE_MEM | IORESOURCE_PREFETCH,
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compute_allocate_resource(&dev->link[link], resource,
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IORESOURCE_MEM | IORESOURCE_PREFETCH,
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IORESOURCE_MEM);
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}
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}
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@ -402,7 +402,7 @@ static void amdk8_set_resource(struct device * dev, struct resource *resource, u
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if (resource->flags & IORESOURCE_STORED) {
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return;
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}
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/* Only handle PCI memory and IO resources */
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if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
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return;
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@ -413,7 +413,7 @@ static void amdk8_set_resource(struct device * dev, struct resource *resource, u
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}
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/* Get the base address */
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rbase = resource->base;
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/* Get the limit (rounded up) */
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rend = resource_end(resource);
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@ -436,14 +436,14 @@ static void amdk8_set_resource(struct device * dev, struct resource *resource, u
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limit |= (nodeid & 7);
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if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
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printk(BIOS_SPEW, "%s, enabling legacy VGA IO forwarding for %s link %x\n",
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__func__, dev_path(dev), link);
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printk(BIOS_SPEW, "%s, enabling legacy VGA IO forwarding for %s link %x\n",
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__func__, dev_path(dev), link);
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base |= PCI_IO_BASE_VGA_EN;
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}
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if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_NO_ISA) {
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base |= PCI_IO_BASE_NO_ISA;
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}
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f1_write_config32(reg + 0x4, limit);
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f1_write_config32(reg, base);
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}
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@ -476,7 +476,7 @@ static void amdk8_set_resource(struct device * dev, struct resource *resource, u
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* but it is too diffcult to deal with the resource allocation magic.
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*/
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#ifdef CONFIG_MULTIPLE_VGA_INIT
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extern struct device * vga_pri; // the primary vga device, defined in device.c
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extern struct device * vga_pri; // the primary vga device, defined in device.c
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#endif
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static void amdk8_create_vga_resource(struct device * dev, unsigned nodeid)
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@ -491,7 +491,7 @@ static void amdk8_create_vga_resource(struct device * dev, unsigned nodeid)
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for (link = 0; link < dev->links; link++) {
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if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
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#ifdef CONFIG_MULTIPLE_VGA_INIT
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printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d dev->link[link] bus range [%d,%d]\n", vga_pri->bus->secondary,
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printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d dev->link[link] bus range [%d,%d]\n", vga_pri->bus->secondary,
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dev->link[link].secondary,dev->link[link].subordinate);
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/* We need to make sure the vga_pri is under the link */
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if((vga_pri->bus->secondary >= dev->link[link].secondary ) &&
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@ -501,7 +501,7 @@ static void amdk8_create_vga_resource(struct device * dev, unsigned nodeid)
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break;
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}
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}
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/* no VGA card installed */
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if (link == dev->links)
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return;
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@ -545,7 +545,7 @@ static void amdk8_set_resources(struct device * dev)
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printk(BIOS_DEBUG, "amdk8_set_resources: nodeid %d\n", nodeid);
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amdk8_create_vga_resource(dev, nodeid);
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/* Set each resource we have found */
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for(i = 0; i < dev->resources; i++) {
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amdk8_set_resource(dev, &dev->resource[i], nodeid);
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