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UPSTREAM: mainboard/intel/galileo: Support bootblock in C

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Initialize the GPIOs during the boot block to properly route the SOC
UART pins.

TEST=Build and run on Galileo Gen2

BUG=None
BRANCH=None
TEST=None

Change-Id: I22c24f8c83f04566a0bbd598a141a5209569a924
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/15133
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/351786
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Lee Leahy 2016-06-08 14:01:05 -07:00 • committed by chrome-bot
parent 97f0b07fac
commit 6fde566b59
1 changed files with 3 additions and 0 deletions
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3
src/mainboard/intel/galileo/Makefile.inc
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@ -17,6 +17,9 @@ ifeq ($(CONFIG_PLATFORM_USES_FSP1_1),y)
CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/quark
endif
bootblock-y += gpio.c
bootblock-y += reg_access.c
romstage-y += gpio.c
romstage-y += reg_access.c