From 6fde566b59842555bce37d6b8f13cfe224d9fd73 Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Wed, 8 Jun 2016 14:01:05 -0700 Subject: [PATCH] UPSTREAM: mainboard/intel/galileo: Support bootblock in C Initialize the GPIOs during the boot block to properly route the SOC UART pins. TEST=Build and run on Galileo Gen2 BUG=None BRANCH=None TEST=None Change-Id: I22c24f8c83f04566a0bbd598a141a5209569a924 Original-Signed-off-by: Lee Leahy Original-Reviewed-on: https://review.coreboot.org/15133 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin Signed-off-by: Aaron Durbin Reviewed-on: https://chromium-review.googlesource.com/351786 Commit-Ready: Furquan Shaikh Tested-by: Furquan Shaikh Reviewed-by: Furquan Shaikh --- src/mainboard/intel/galileo/Makefile.inc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mainboard/intel/galileo/Makefile.inc b/src/mainboard/intel/galileo/Makefile.inc index 83fb0db3bc..5aad30861a 100644 --- a/src/mainboard/intel/galileo/Makefile.inc +++ b/src/mainboard/intel/galileo/Makefile.inc @@ -17,6 +17,9 @@ ifeq ($(CONFIG_PLATFORM_USES_FSP1_1),y) CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/quark endif +bootblock-y += gpio.c +bootblock-y += reg_access.c + romstage-y += gpio.c romstage-y += reg_access.c