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UPSTREAM: mb/google/eve: Set SUSWARN# pin to native function

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Set GPP_A13/SUSWARN# pin mode to native function 1.  This pin is tied
to SUSACK# in the schematic and and is intented to be used in Deep Sx
so it should not be configured for GPIO mode.

BUG=b:35581264
TEST=build and boot on Eve platform, test that Deep S3 and Deep S5
are still functional. (this change should have no visible effect)

Change-Id: I66e41615c4a19083b8bc5835f1139e8f15cd372b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1a51086815
Original-Change-Id: Ie2dc24d095872ab93a5bfcbe5307c3b7a8e4dbcc
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/19549
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/496049
Commit-Ready: Duncan Laurie <dlaurie@google.com>
This commit is contained in:
Duncan Laurie 2017-05-03 10:14:07 -07:00 • committed by chrome-bot
parent 6a578b5cda
commit 4e0cd97c53
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/google/eve/gpio.h
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@ -58,7 +58,7 @@ static const struct pad_config gpio_table[] = {
/* CLKOUT_LPC1 */ PAD_CFG_NC(GPP_A10),
/* PME# */ PAD_CFG_NC(GPP_A11), /* TP67 */
/* BM_BUSY# */ PAD_CFG_NC(GPP_A12),
/* SUSWARN# */ PAD_CFG_NC(GPP_A13),
/* SUSWARN# */ PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
/* ESPI_RESET# */
/* SUSACK# */ PAD_CFG_NF(GPP_A15, NONE, DEEP, NF1),
/* SD_1P8_SEL */ PAD_CFG_NC(GPP_A16),