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UPSTREAM: drivers/spi/tpm: Add tis.c and tpm.c to ramstage and romstage

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These files are required to support recovery MRC cache hash
save/restore in romtage/ramstage.

BUG=b:35583330

Change-Id: I60177f7080075c74c8eaa63b83178d67cea49cad
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 580e0c584f
Original-Change-Id: Idd0a4ee1c5f8f861caf40d841053b83a9d7aaef8
Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/19092
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/471454
This commit is contained in:
Furquan Shaikh 2017-03-31 13:18:00 -07:00 • committed by chrome-bot
parent bbda19b27e
commit 045811048c
1 changed files with 2 additions and 0 deletions
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2
src/drivers/spi/tpm/Makefile.inc
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@ -1,4 +1,6 @@
verstage-$(CONFIG_SPI_TPM) += tis.c tpm.c
romstage-$(CONFIG_SPI_TPM) += tis.c tpm.c
ramstage-$(CONFIG_SPI_TPM) += tis.c tpm.c
ifneq ($(CONFIG_CHROMEOS),y)
bootblock-$(CONFIG_SPI_TPM) += tis.c tpm.c