From 045811048c15a5f20a695d4ec2199697b4e553cd Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Fri, 31 Mar 2017 13:18:00 -0700 Subject: [PATCH] UPSTREAM: drivers/spi/tpm: Add tis.c and tpm.c to ramstage and romstage These files are required to support recovery MRC cache hash save/restore in romtage/ramstage. BUG=b:35583330 Change-Id: I60177f7080075c74c8eaa63b83178d67cea49cad Signed-off-by: Patrick Georgi Original-Commit-Id: 580e0c584f1ba0f5196c2a3880b55592909d9df4 Original-Change-Id: Idd0a4ee1c5f8f861caf40d841053b83a9d7aaef8 Original-Signed-off-by: Furquan Shaikh Original-Reviewed-on: https://review.coreboot.org/19092 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Aaron Durbin Original-Reviewed-by: Paul Menzel Reviewed-on: https://chromium-review.googlesource.com/471454 --- src/drivers/spi/tpm/Makefile.inc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/drivers/spi/tpm/Makefile.inc b/src/drivers/spi/tpm/Makefile.inc index 7d1b390f08..cc7d715609 100644 --- a/src/drivers/spi/tpm/Makefile.inc +++ b/src/drivers/spi/tpm/Makefile.inc @@ -1,4 +1,6 @@ verstage-$(CONFIG_SPI_TPM) += tis.c tpm.c +romstage-$(CONFIG_SPI_TPM) += tis.c tpm.c +ramstage-$(CONFIG_SPI_TPM) += tis.c tpm.c ifneq ($(CONFIG_CHROMEOS),y) bootblock-$(CONFIG_SPI_TPM) += tis.c tpm.c