mirror of
https://github.com/array-in-a-matrix/SAROO.git
synced 2025-04-02 10:31:43 -04:00
399 lines
20 KiB
XML
399 lines
20 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<system name="$${FILENAME}">
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<component
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name="$${FILENAME}"
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displayName="$${FILENAME}"
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version="1.0"
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description=""
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tags=""
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categories="System" />
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<parameter name="bonusData"><![CDATA[bonusData
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{
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element $${FILENAME}
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{
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}
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element FSMC_master
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{
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datum _sortIndex
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{
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value = "2";
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type = "int";
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}
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}
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element altpll_0
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{
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datum _sortIndex
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{
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value = "1";
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type = "int";
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}
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}
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element cdc_fifo_0
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{
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datum _sortIndex
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{
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value = "4";
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type = "int";
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}
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}
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element clk_0
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{
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datum _sortIndex
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{
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value = "0";
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type = "int";
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}
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}
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element new_sdram_controller_0
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{
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datum _sortIndex
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{
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value = "5";
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type = "int";
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}
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}
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element saturn_master
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{
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datum _sortIndex
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{
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value = "3";
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type = "int";
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}
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}
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}
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]]></parameter>
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<parameter name="clockCrossingAdapter" value="HANDSHAKE" />
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<parameter name="device" value="EP4CE6F17C8" />
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<parameter name="deviceFamily" value="Cyclone IV E" />
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<parameter name="deviceSpeedGrade" value="8" />
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<parameter name="fabricMode" value="QSYS" />
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<parameter name="generateLegacySim" value="false" />
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<parameter name="generationId" value="0" />
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<parameter name="globalResetBus" value="false" />
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<parameter name="hdlLanguage" value="VERILOG" />
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<parameter name="maxAdditionalLatency" value="1" />
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<parameter name="projectName" value="SSMaster.qpf" />
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<parameter name="sopcBorderPoints" value="false" />
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<parameter name="systemHash" value="0" />
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<parameter name="timeStamp" value="0" />
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<parameter name="useTestBenchNamingPattern" value="false" />
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<instanceScript></instanceScript>
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<interface name="clk" internal="clk_0.clk_in" type="clock" dir="end" />
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<interface name="reset" internal="clk_0.clk_in_reset" type="reset" dir="end" />
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<interface
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name="mem_pin"
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internal="new_sdram_controller_0.wire"
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type="conduit"
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dir="end" />
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<interface
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name="altpll_locked"
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internal="altpll_0.locked_conduit"
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type="conduit"
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dir="end" />
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<interface name="avm_clk" internal="altpll_0.c1" type="clock" dir="start" />
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<interface
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name="saturn_bus"
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internal="saturn_master.ext_bus"
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type="conduit"
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dir="end" />
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<interface
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name="fsmc_bus"
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internal="FSMC_master.ext_bus"
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type="conduit"
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dir="end" />
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<interface
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name="cdc_fifo"
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internal="cdc_fifo_0.conduit_end"
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type="conduit"
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dir="end" />
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<module kind="clock_source" version="13.1" enabled="1" name="clk_0">
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<parameter name="clockFrequency" value="50000000" />
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<parameter name="clockFrequencyKnown" value="true" />
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<parameter name="inputClockFrequency" value="0" />
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<parameter name="resetSynchronousEdges" value="NONE" />
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</module>
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<module
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kind="altera_avalon_new_sdram_controller"
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version="13.1"
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enabled="1"
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name="new_sdram_controller_0">
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<parameter name="TAC" value="6.0" />
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<parameter name="TRCD" value="20.0" />
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<parameter name="TRFC" value="70.0" />
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<parameter name="TRP" value="20.0" />
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<parameter name="TWR" value="20.0" />
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<parameter name="casLatency" value="2" />
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<parameter name="columnWidth" value="9" />
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<parameter name="dataWidth" value="16" />
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<parameter name="generateSimulationModel" value="false" />
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<parameter name="initRefreshCommands" value="8" />
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<parameter name="model">single_Micron_MT48LC4M32B2_7_chip</parameter>
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<parameter name="numberOfBanks" value="4" />
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<parameter name="numberOfChipSelects" value="1" />
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<parameter name="pinsSharedViaTriState" value="false" />
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<parameter name="powerUpDelay" value="200.0" />
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<parameter name="refreshPeriod" value="31.25" />
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<parameter name="rowWidth" value="13" />
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<parameter name="masteredTristateBridgeSlave" value="0" />
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<parameter name="TMRD" value="2" />
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<parameter name="initNOPDelay" value="0.0" />
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<parameter name="registerDataIn" value="true" />
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<parameter name="clockRate" value="100000000" />
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<parameter name="componentName">cqsys_new_sdram_controller_0</parameter>
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</module>
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<module kind="altpll" version="13.1" enabled="1" name="altpll_0">
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<parameter name="HIDDEN_CUSTOM_ELABORATION">altpll_avalon_elaboration</parameter>
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<parameter name="HIDDEN_CUSTOM_POST_EDIT">altpll_avalon_post_edit</parameter>
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<parameter name="INTENDED_DEVICE_FAMILY" value="Cyclone IV E" />
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<parameter name="WIDTH_CLOCK" value="5" />
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<parameter name="WIDTH_PHASECOUNTERSELECT" value="" />
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<parameter name="PRIMARY_CLOCK" value="" />
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<parameter name="INCLK0_INPUT_FREQUENCY" value="20000" />
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<parameter name="INCLK1_INPUT_FREQUENCY" value="" />
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<parameter name="OPERATION_MODE" value="NORMAL" />
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<parameter name="PLL_TYPE" value="AUTO" />
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<parameter name="QUALIFY_CONF_DONE" value="" />
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<parameter name="COMPENSATE_CLOCK" value="CLK0" />
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<parameter name="SCAN_CHAIN" value="" />
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<parameter name="GATE_LOCK_SIGNAL" value="" />
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<parameter name="GATE_LOCK_COUNTER" value="" />
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<parameter name="LOCK_HIGH" value="" />
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<parameter name="LOCK_LOW" value="" />
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<parameter name="VALID_LOCK_MULTIPLIER" value="" />
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<parameter name="INVALID_LOCK_MULTIPLIER" value="" />
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<parameter name="SWITCH_OVER_ON_LOSSCLK" value="" />
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<parameter name="SWITCH_OVER_ON_GATED_LOCK" value="" />
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<parameter name="ENABLE_SWITCH_OVER_COUNTER" value="" />
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<parameter name="SKIP_VCO" value="" />
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<parameter name="SWITCH_OVER_COUNTER" value="" />
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<parameter name="SWITCH_OVER_TYPE" value="" />
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<parameter name="FEEDBACK_SOURCE" value="" />
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<parameter name="BANDWIDTH" value="" />
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<parameter name="BANDWIDTH_TYPE" value="AUTO" />
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<parameter name="SPREAD_FREQUENCY" value="" />
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<parameter name="DOWN_SPREAD" value="" />
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<parameter name="SELF_RESET_ON_GATED_LOSS_LOCK" value="" />
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<parameter name="SELF_RESET_ON_LOSS_LOCK" value="" />
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<parameter name="CLK0_MULTIPLY_BY" value="2" />
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<parameter name="CLK1_MULTIPLY_BY" value="2" />
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<parameter name="CLK2_MULTIPLY_BY" value="" />
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<parameter name="CLK3_MULTIPLY_BY" value="" />
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<parameter name="CLK4_MULTIPLY_BY" value="" />
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<parameter name="CLK5_MULTIPLY_BY" value="" />
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<parameter name="CLK6_MULTIPLY_BY" value="" />
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<parameter name="CLK7_MULTIPLY_BY" value="" />
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<parameter name="CLK8_MULTIPLY_BY" value="" />
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<parameter name="CLK9_MULTIPLY_BY" value="" />
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<parameter name="EXTCLK0_MULTIPLY_BY" value="" />
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<parameter name="EXTCLK1_MULTIPLY_BY" value="" />
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<parameter name="EXTCLK2_MULTIPLY_BY" value="" />
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<parameter name="EXTCLK3_MULTIPLY_BY" value="" />
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<parameter name="CLK0_DIVIDE_BY" value="1" />
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<parameter name="CLK1_DIVIDE_BY" value="1" />
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<parameter name="CLK2_DIVIDE_BY" value="" />
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<parameter name="CLK3_DIVIDE_BY" value="" />
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<parameter name="CLK4_DIVIDE_BY" value="" />
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<parameter name="CLK5_DIVIDE_BY" value="" />
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<parameter name="CLK6_DIVIDE_BY" value="" />
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<parameter name="CLK7_DIVIDE_BY" value="" />
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<parameter name="CLK8_DIVIDE_BY" value="" />
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<parameter name="CLK9_DIVIDE_BY" value="" />
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<parameter name="EXTCLK0_DIVIDE_BY" value="" />
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<parameter name="EXTCLK1_DIVIDE_BY" value="" />
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<parameter name="EXTCLK2_DIVIDE_BY" value="" />
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<parameter name="EXTCLK3_DIVIDE_BY" value="" />
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<parameter name="CLK0_PHASE_SHIFT" value="0" />
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<parameter name="CLK1_PHASE_SHIFT" value="0" />
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<parameter name="CLK2_PHASE_SHIFT" value="" />
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<parameter name="CLK3_PHASE_SHIFT" value="" />
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<parameter name="CLK4_PHASE_SHIFT" value="" />
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<parameter name="CLK5_PHASE_SHIFT" value="" />
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<parameter name="CLK6_PHASE_SHIFT" value="" />
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<parameter name="CLK7_PHASE_SHIFT" value="" />
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<parameter name="CLK8_PHASE_SHIFT" value="" />
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<parameter name="CLK9_PHASE_SHIFT" value="" />
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<parameter name="EXTCLK0_PHASE_SHIFT" value="" />
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<parameter name="EXTCLK1_PHASE_SHIFT" value="" />
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<parameter name="EXTCLK2_PHASE_SHIFT" value="" />
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<parameter name="EXTCLK3_PHASE_SHIFT" value="" />
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<parameter name="CLK0_DUTY_CYCLE" value="50" />
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<parameter name="CLK1_DUTY_CYCLE" value="50" />
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<parameter name="CLK2_DUTY_CYCLE" value="" />
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<parameter name="CLK3_DUTY_CYCLE" value="" />
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<parameter name="CLK4_DUTY_CYCLE" value="" />
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<parameter name="CLK5_DUTY_CYCLE" value="" />
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<parameter name="CLK6_DUTY_CYCLE" value="" />
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<parameter name="CLK7_DUTY_CYCLE" value="" />
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<parameter name="CLK8_DUTY_CYCLE" value="" />
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<parameter name="CLK9_DUTY_CYCLE" value="" />
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<parameter name="EXTCLK0_DUTY_CYCLE" value="" />
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<parameter name="EXTCLK1_DUTY_CYCLE" value="" />
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<parameter name="EXTCLK2_DUTY_CYCLE" value="" />
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<parameter name="EXTCLK3_DUTY_CYCLE" value="" />
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<parameter name="PORT_clkena0" value="PORT_UNUSED" />
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<parameter name="PORT_clkena1" value="PORT_UNUSED" />
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<parameter name="PORT_clkena2" value="PORT_UNUSED" />
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<parameter name="PORT_clkena3" value="PORT_UNUSED" />
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<parameter name="PORT_clkena4" value="PORT_UNUSED" />
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<parameter name="PORT_clkena5" value="PORT_UNUSED" />
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<parameter name="PORT_extclkena0" value="" />
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<parameter name="PORT_extclkena1" value="" />
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<parameter name="PORT_extclkena2" value="" />
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<parameter name="PORT_extclkena3" value="" />
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<parameter name="PORT_extclk0" value="PORT_UNUSED" />
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<parameter name="PORT_extclk1" value="PORT_UNUSED" />
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<parameter name="PORT_extclk2" value="PORT_UNUSED" />
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<parameter name="PORT_extclk3" value="PORT_UNUSED" />
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<parameter name="PORT_CLKBAD0" value="PORT_UNUSED" />
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<parameter name="PORT_CLKBAD1" value="PORT_UNUSED" />
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<parameter name="PORT_clk0" value="PORT_USED" />
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<parameter name="PORT_clk1" value="PORT_USED" />
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<parameter name="PORT_clk2" value="PORT_UNUSED" />
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<parameter name="PORT_clk3" value="PORT_UNUSED" />
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<parameter name="PORT_clk4" value="PORT_UNUSED" />
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<parameter name="PORT_clk5" value="PORT_UNUSED" />
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<parameter name="PORT_clk6" value="" />
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<parameter name="PORT_clk7" value="" />
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<parameter name="PORT_clk8" value="" />
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<parameter name="PORT_clk9" value="" />
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<parameter name="PORT_SCANDATA" value="PORT_UNUSED" />
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<parameter name="PORT_SCANDATAOUT" value="PORT_UNUSED" />
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<parameter name="PORT_SCANDONE" value="PORT_UNUSED" />
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<parameter name="PORT_SCLKOUT1" value="" />
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<parameter name="PORT_SCLKOUT0" value="" />
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<parameter name="PORT_ACTIVECLOCK" value="PORT_UNUSED" />
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<parameter name="PORT_CLKLOSS" value="PORT_UNUSED" />
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<parameter name="PORT_INCLK1" value="PORT_UNUSED" />
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<parameter name="PORT_INCLK0" value="PORT_USED" />
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<parameter name="PORT_FBIN" value="PORT_UNUSED" />
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<parameter name="PORT_PLLENA" value="PORT_UNUSED" />
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<parameter name="PORT_CLKSWITCH" value="PORT_UNUSED" />
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<parameter name="PORT_ARESET" value="PORT_UNUSED" />
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<parameter name="PORT_PFDENA" value="PORT_UNUSED" />
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<parameter name="PORT_SCANCLK" value="PORT_UNUSED" />
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<parameter name="PORT_SCANACLR" value="PORT_UNUSED" />
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<parameter name="PORT_SCANREAD" value="PORT_UNUSED" />
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<parameter name="PORT_SCANWRITE" value="PORT_UNUSED" />
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<parameter name="PORT_ENABLE0" value="" />
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<parameter name="PORT_ENABLE1" value="" />
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<parameter name="PORT_LOCKED" value="PORT_USED" />
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<parameter name="PORT_CONFIGUPDATE" value="PORT_UNUSED" />
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<parameter name="PORT_FBOUT" value="" />
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<parameter name="PORT_PHASEDONE" value="PORT_UNUSED" />
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<parameter name="PORT_PHASESTEP" value="PORT_UNUSED" />
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<parameter name="PORT_PHASEUPDOWN" value="PORT_UNUSED" />
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<parameter name="PORT_SCANCLKENA" value="PORT_UNUSED" />
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<parameter name="PORT_PHASECOUNTERSELECT" value="PORT_UNUSED" />
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<parameter name="PORT_VCOOVERRANGE" value="" />
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<parameter name="PORT_VCOUNDERRANGE" value="" />
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<parameter name="DPA_MULTIPLY_BY" value="" />
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<parameter name="DPA_DIVIDE_BY" value="" />
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<parameter name="DPA_DIVIDER" value="" />
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<parameter name="VCO_MULTIPLY_BY" value="" />
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<parameter name="VCO_DIVIDE_BY" value="" />
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<parameter name="SCLKOUT0_PHASE_SHIFT" value="" />
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<parameter name="SCLKOUT1_PHASE_SHIFT" value="" />
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<parameter name="VCO_FREQUENCY_CONTROL" value="" />
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<parameter name="VCO_PHASE_SHIFT_STEP" value="" />
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<parameter name="USING_FBMIMICBIDIR_PORT" value="" />
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<parameter name="SCAN_CHAIN_MIF_FILE" value="" />
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<parameter name="AVALON_USE_SEPARATE_SYSCLK" value="NO" />
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<parameter name="HIDDEN_CONSTANTS">CT#PORT_clk5 PORT_UNUSED CT#PORT_clk4 PORT_UNUSED CT#PORT_clk3 PORT_UNUSED CT#PORT_clk2 PORT_UNUSED CT#PORT_clk1 PORT_USED CT#PORT_clk0 PORT_USED CT#CLK0_MULTIPLY_BY 2 CT#PORT_SCANWRITE PORT_UNUSED CT#PORT_SCANACLR PORT_UNUSED CT#PORT_PFDENA PORT_UNUSED CT#PORT_PLLENA PORT_UNUSED CT#PORT_SCANDATA PORT_UNUSED CT#PORT_SCANCLKENA PORT_UNUSED CT#WIDTH_CLOCK 5 CT#PORT_SCANDATAOUT PORT_UNUSED CT#LPM_TYPE altpll CT#PLL_TYPE AUTO CT#CLK0_PHASE_SHIFT 0 CT#CLK1_DUTY_CYCLE 50 CT#PORT_PHASEDONE PORT_UNUSED CT#OPERATION_MODE NORMAL CT#PORT_CONFIGUPDATE PORT_UNUSED CT#CLK1_MULTIPLY_BY 2 CT#COMPENSATE_CLOCK CLK0 CT#PORT_CLKSWITCH PORT_UNUSED CT#INCLK0_INPUT_FREQUENCY 20000 CT#PORT_SCANDONE PORT_UNUSED CT#PORT_CLKLOSS PORT_UNUSED CT#PORT_INCLK1 PORT_UNUSED CT#AVALON_USE_SEPARATE_SYSCLK NO CT#PORT_INCLK0 PORT_USED CT#PORT_clkena5 PORT_UNUSED CT#PORT_clkena4 PORT_UNUSED CT#PORT_clkena3 PORT_UNUSED CT#PORT_clkena2 PORT_UNUSED CT#PORT_clkena1 PORT_UNUSED CT#PORT_clkena0 PORT_UNUSED CT#CLK1_PHASE_SHIFT 0 CT#PORT_ARESET PORT_UNUSED CT#BANDWIDTH_TYPE AUTO CT#INTENDED_DEVICE_FAMILY {Cyclone IV E} CT#PORT_SCANREAD PORT_UNUSED CT#PORT_PHASESTEP PORT_UNUSED CT#PORT_SCANCLK PORT_UNUSED CT#PORT_CLKBAD1 PORT_UNUSED CT#PORT_CLKBAD0 PORT_UNUSED CT#PORT_FBIN PORT_UNUSED CT#PORT_PHASEUPDOWN PORT_UNUSED CT#PORT_extclk3 PORT_UNUSED CT#PORT_extclk2 PORT_UNUSED CT#PORT_extclk1 PORT_UNUSED CT#PORT_PHASECOUNTERSELECT PORT_UNUSED CT#PORT_extclk0 PORT_UNUSED CT#PORT_ACTIVECLOCK PORT_UNUSED CT#CLK0_DUTY_CYCLE 50 CT#CLK0_DIVIDE_BY 1 CT#CLK1_DIVIDE_BY 1 CT#PORT_LOCKED PORT_USED</parameter>
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<parameter name="HIDDEN_PRIVATES">PT#GLOCKED_FEATURE_ENABLED 0 PT#SPREAD_FEATURE_ENABLED 0 PT#BANDWIDTH_FREQ_UNIT MHz PT#CUR_DEDICATED_CLK c0 PT#INCLK0_FREQ_EDIT 50.000 PT#BANDWIDTH_PRESET Low PT#PLL_LVDS_PLL_CHECK 0 PT#BANDWIDTH_USE_PRESET 0 PT#AVALON_USE_SEPARATE_SYSCLK NO PT#PLL_ENHPLL_CHECK 0 PT#OUTPUT_FREQ_UNIT1 MHz PT#OUTPUT_FREQ_UNIT0 MHz PT#PHASE_RECONFIG_FEATURE_ENABLED 1 PT#CREATE_CLKBAD_CHECK 0 PT#CLKSWITCH_CHECK 0 PT#INCLK1_FREQ_EDIT 100.000 PT#NORMAL_MODE_RADIO 1 PT#SRC_SYNCH_COMP_RADIO 0 PT#PLL_ARESET_CHECK 0 PT#LONG_SCAN_RADIO 1 PT#SCAN_FEATURE_ENABLED 1 PT#PHASE_RECONFIG_INPUTS_CHECK 0 PT#USE_CLK1 1 PT#USE_CLK0 1 PT#PRIMARY_CLK_COMBO inclk0 PT#BANDWIDTH 1.000 PT#GLOCKED_COUNTER_EDIT_CHANGED 1 PT#PLL_FASTPLL_CHECK 0 PT#SPREAD_FREQ_UNIT KHz PT#PLL_AUTOPLL_CHECK 1 PT#LVDS_PHASE_SHIFT_UNIT1 deg PT#LVDS_PHASE_SHIFT_UNIT0 deg PT#OUTPUT_FREQ_MODE1 1 PT#SWITCHOVER_FEATURE_ENABLED 0 PT#MIG_DEVICE_SPEED_GRADE Any PT#OUTPUT_FREQ_MODE0 1 PT#BANDWIDTH_FEATURE_ENABLED 1 PT#INCLK0_FREQ_UNIT_COMBO MHz PT#ZERO_DELAY_RADIO 0 PT#OUTPUT_FREQ1 100.00000000 PT#OUTPUT_FREQ0 100.00000000 PT#SHORT_SCAN_RADIO 0 PT#LVDS_MODE_DATA_RATE_DIRTY 0 PT#CUR_FBIN_CLK c0 PT#PLL_ADVANCED_PARAM_CHECK 0 PT#CLKBAD_SWITCHOVER_CHECK 0 PT#PHASE_SHIFT_STEP_ENABLED_CHECK 0 PT#DEVICE_SPEED_GRADE 8 PT#PLL_FBMIMIC_CHECK 0 PT#LVDS_MODE_DATA_RATE {Not Available} PT#LOCKED_OUTPUT_CHECK 1 PT#SPREAD_PERCENT 0.500 PT#PHASE_SHIFT1 0.00000000 PT#PHASE_SHIFT0 0.00000000 PT#DIV_FACTOR1 1 PT#DIV_FACTOR0 1 PT#CNX_NO_COMPENSATE_RADIO 0 PT#USE_CLKENA1 0 PT#USE_CLKENA0 0 PT#CREATE_INCLK1_CHECK 0 PT#GLOCK_COUNTER_EDIT 1048575 PT#INCLK1_FREQ_UNIT_COMBO MHz PT#EFF_OUTPUT_FREQ_VALUE1 100.000000 PT#EFF_OUTPUT_FREQ_VALUE0 100.000000 PT#SPREAD_FREQ 50.000 PT#USE_MIL_SPEED_GRADE 0 PT#EXPLICIT_SWITCHOVER_COUNTER 0 PT#STICKY_CLK1 1 PT#STICKY_CLK0 1 PT#EXT_FEEDBACK_RADIO 0 PT#MIRROR_CLK1 0 PT#MIRROR_CLK0 0 PT#SWITCHOVER_COUNT_EDIT 1 PT#SELF_RESET_LOCK_LOSS 0 PT#PLL_PFDENA_CHECK 0 PT#INT_FEEDBACK__MODE_RADIO 1 PT#INCLK1_FREQ_EDIT_CHANGED 1 PT#CLKLOSS_CHECK 0 PT#SYNTH_WRAPPER_GEN_POSTFIX 0 PT#PHASE_SHIFT_UNIT1 deg PT#PHASE_SHIFT_UNIT0 deg PT#BANDWIDTH_USE_AUTO 1 PT#HAS_MANUAL_SWITCHOVER 1 PT#MULT_FACTOR1 1 PT#MULT_FACTOR0 1 PT#SPREAD_USE 0 PT#GLOCKED_MODE_CHECK 0 PT#SACN_INPUTS_CHECK 0 PT#DUTY_CYCLE1 50.00000000 PT#INTENDED_DEVICE_FAMILY {Cyclone IV E} PT#DUTY_CYCLE0 50.00000000 PT#PLL_TARGET_HARCOPY_CHECK 0 PT#INCLK1_FREQ_UNIT_CHANGED 1 PT#RECONFIG_FILE ALTPLL1415009164408010.mif PT#ACTIVECLK_CHECK 0</parameter>
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<parameter name="HIDDEN_USED_PORTS">UP#locked used UP#c1 used UP#c0 used UP#areset used UP#inclk0 used</parameter>
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<parameter name="HIDDEN_IS_NUMERIC">IN#WIDTH_CLOCK 1 IN#CLK0_DUTY_CYCLE 1 IN#PLL_TARGET_HARCOPY_CHECK 1 IN#CLK1_MULTIPLY_BY 1 IN#SWITCHOVER_COUNT_EDIT 1 IN#INCLK0_INPUT_FREQUENCY 1 IN#PLL_LVDS_PLL_CHECK 1 IN#PLL_AUTOPLL_CHECK 1 IN#PLL_FASTPLL_CHECK 1 IN#CLK1_DUTY_CYCLE 1 IN#PLL_ENHPLL_CHECK 1 IN#DIV_FACTOR1 1 IN#DIV_FACTOR0 1 IN#LVDS_MODE_DATA_RATE_DIRTY 1 IN#GLOCK_COUNTER_EDIT 1 IN#CLK0_DIVIDE_BY 1 IN#MULT_FACTOR1 1 IN#MULT_FACTOR0 1 IN#CLK0_MULTIPLY_BY 1 IN#USE_MIL_SPEED_GRADE 1 IN#CLK1_DIVIDE_BY 1</parameter>
|
|
<parameter name="HIDDEN_MF_PORTS">MF#areset 1 MF#clk 1 MF#locked 1 MF#inclk 1</parameter>
|
|
<parameter name="HIDDEN_IF_PORTS">IF#locked {output 0} IF#reset {input 0} IF#clk {input 0} IF#readdata {output 32} IF#write {input 0} IF#phasedone {output 0} IF#address {input 2} IF#c1 {output 0} IF#c0 {output 0} IF#writedata {input 32} IF#read {input 0} IF#areset {input 0}</parameter>
|
|
<parameter name="HIDDEN_IS_FIRST_EDIT" value="0" />
|
|
<parameter name="AUTO_INCLK_INTERFACE_CLOCK_RATE" value="50000000" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
|
|
</module>
|
|
<module kind="ext_master" version="1.0" enabled="1" name="FSMC_master">
|
|
<parameter name="AUTO_AVM_CLK_CLOCK_RATE" value="100000000" />
|
|
</module>
|
|
<module kind="ext_master" version="1.0" enabled="1" name="saturn_master">
|
|
<parameter name="AUTO_AVM_CLK_CLOCK_RATE" value="100000000" />
|
|
</module>
|
|
<module kind="cdc_fifo" version="1.0" enabled="1" name="cdc_fifo_0">
|
|
<parameter name="AUTO_AVM_CLK_CLOCK_RATE" value="100000000" />
|
|
</module>
|
|
<connection
|
|
kind="reset"
|
|
version="13.1"
|
|
start="clk_0.clk_reset"
|
|
end="new_sdram_controller_0.reset" />
|
|
<connection
|
|
kind="reset"
|
|
version="13.1"
|
|
start="clk_0.clk_reset"
|
|
end="altpll_0.inclk_interface_reset" />
|
|
<connection
|
|
kind="clock"
|
|
version="13.1"
|
|
start="clk_0.clk"
|
|
end="altpll_0.inclk_interface" />
|
|
<connection
|
|
kind="clock"
|
|
version="13.1"
|
|
start="altpll_0.c0"
|
|
end="new_sdram_controller_0.clk" />
|
|
<connection
|
|
kind="clock"
|
|
version="13.1"
|
|
start="altpll_0.c0"
|
|
end="FSMC_master.avm_clk" />
|
|
<connection
|
|
kind="reset"
|
|
version="13.1"
|
|
start="clk_0.clk_reset"
|
|
end="FSMC_master.avm_reset" />
|
|
<connection
|
|
kind="clock"
|
|
version="13.1"
|
|
start="altpll_0.c0"
|
|
end="saturn_master.avm_clk" />
|
|
<connection
|
|
kind="reset"
|
|
version="13.1"
|
|
start="clk_0.clk_reset"
|
|
end="saturn_master.avm_reset" />
|
|
<connection
|
|
kind="avalon"
|
|
version="13.1"
|
|
start="saturn_master.memory_master"
|
|
end="new_sdram_controller_0.s1">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x0000" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="avalon"
|
|
version="13.1"
|
|
start="FSMC_master.memory_master"
|
|
end="new_sdram_controller_0.s1">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x0000" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<connection
|
|
kind="clock"
|
|
version="13.1"
|
|
start="altpll_0.c0"
|
|
end="cdc_fifo_0.avm_clk" />
|
|
<connection
|
|
kind="reset"
|
|
version="13.1"
|
|
start="clk_0.clk_reset"
|
|
end="cdc_fifo_0.avm_reset" />
|
|
<connection
|
|
kind="avalon"
|
|
version="13.1"
|
|
start="cdc_fifo_0.read_master"
|
|
end="new_sdram_controller_0.s1">
|
|
<parameter name="arbitrationPriority" value="1" />
|
|
<parameter name="baseAddress" value="0x0000" />
|
|
<parameter name="defaultConnection" value="false" />
|
|
</connection>
|
|
<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
|
|
<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
|
|
</system>
|