# -------------------------------------------------------------------------- # # # Copyright (C) 1991-2013 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any output files from any of the foregoing # (including device programming or simulation files), and any # associated documentation or information are expressly subject # to the terms and conditions of the Altera Program License # Subscription Agreement, Altera MegaCore Function License # Agreement, or other applicable license agreement, including, # without limitation, that your use is for the sole purpose of # programming logic devices manufactured by Altera and sold by # Altera or its authorized distributors. Please refer to the # applicable agreement for further details. # # -------------------------------------------------------------------------- # # # Quartus II 32-bit # Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version # Date created = 11:32:21 July 16, 2014 # # -------------------------------------------------------------------------- # # # Notes: # # 1) The default values for assignments are stored in the file: # SSMaster_assignment_defaults.qdf # If this file doesn't exist, see file: # assignment_defaults.qdf # # 2) Altera recommends that you do not modify this file. This # file is updated automatically by the Quartus II software # and any changes you make may be lost or overwritten. # # -------------------------------------------------------------------------- # set_global_assignment -name FAMILY "Cyclone IV E" set_global_assignment -name DEVICE EP4CE6F17C8 set_global_assignment -name TOP_LEVEL_ENTITY SSMaster set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1" set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:32:21 JULY 16, 2014" set_global_assignment -name LAST_QUARTUS_VERSION 14.1.1 set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA set_global_assignment -name DEVICE_FILTER_PIN_COUNT 256 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8 set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL" set_location_assignment PIN_R5 -to SD_ADDR[12] set_location_assignment PIN_T5 -to SD_ADDR[11] set_location_assignment PIN_M7 -to SD_ADDR[10] set_location_assignment PIN_R6 -to SD_ADDR[9] set_location_assignment PIN_T6 -to SD_ADDR[8] set_location_assignment PIN_R7 -to SD_ADDR[7] set_location_assignment PIN_T7 -to SD_ADDR[6] set_location_assignment PIN_R8 -to SD_ADDR[5] set_location_assignment PIN_T8 -to SD_ADDR[4] set_location_assignment PIN_L8 -to SD_ADDR[3] set_location_assignment PIN_M8 -to SD_ADDR[2] set_location_assignment PIN_P8 -to SD_ADDR[1] set_location_assignment PIN_N8 -to SD_ADDR[0] set_location_assignment PIN_P6 -to SD_BA[1] set_location_assignment PIN_N6 -to SD_BA[0] set_location_assignment PIN_P3 -to SD_CAS set_location_assignment PIN_T4 -to SD_CKE set_location_assignment PIN_N5 -to SD_CS set_location_assignment PIN_L1 -to SD_DQ[15] set_location_assignment PIN_L2 -to SD_DQ[14] set_location_assignment PIN_N1 -to SD_DQ[13] set_location_assignment PIN_N2 -to SD_DQ[12] set_location_assignment PIN_P1 -to SD_DQ[11] set_location_assignment PIN_P2 -to SD_DQ[10] set_location_assignment PIN_R1 -to SD_DQ[9] set_location_assignment PIN_T2 -to SD_DQ[8] set_location_assignment PIN_K6 -to SD_DQ[7] set_location_assignment PIN_L4 -to SD_DQ[6] set_location_assignment PIN_L3 -to SD_DQ[5] set_location_assignment PIN_K5 -to SD_DQ[4] set_location_assignment PIN_K2 -to SD_DQ[3] set_location_assignment PIN_K1 -to SD_DQ[2] set_location_assignment PIN_J2 -to SD_DQ[1] set_location_assignment PIN_J1 -to SD_DQ[0] set_location_assignment PIN_T3 -to SD_DQM[1] set_location_assignment PIN_N3 -to SD_DQM[0] set_location_assignment PIN_M6 -to SD_RAS set_location_assignment PIN_L6 -to SD_WE set_location_assignment PIN_M1 -to CLK_50M set_global_assignment -name USE_CONFIGURATION_DEVICE ON set_global_assignment -name GENERATE_TTF_FILE ON set_global_assignment -name GENERATE_RBF_FILE ON set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall set_location_assignment PIN_R4 -to SD_CLK set_location_assignment PIN_R3 -to PSRAM_CS set_location_assignment PIN_J13 -to SS_DATA[2] set_location_assignment PIN_J12 -to SS_DATA[3] set_location_assignment PIN_J14 -to SS_DATA[1] set_location_assignment PIN_J15 -to SS_CS1 set_location_assignment PIN_J16 -to SS_WR1 set_location_assignment PIN_K15 -to SS_ADDR[0] set_location_assignment PIN_K16 -to SS_RD set_location_assignment PIN_J11 -to SS_FC1 set_location_assignment PIN_L15 -to SS_ADDR[11] set_location_assignment PIN_L16 -to SS_ADDR[10] set_location_assignment PIN_L13 -to SS_AAS set_location_assignment PIN_L14 -to SS_TIM0 set_location_assignment PIN_N15 -to SS_ADDR[13] set_location_assignment PIN_N16 -to SS_ADDR[8] set_location_assignment PIN_R16 -to SS_ADDR[17] set_location_assignment PIN_P16 -to SS_ADDR[12] set_location_assignment PIN_P15 -to SS_ADDR[15] set_location_assignment PIN_K12 -to SS_DATA[0] set_location_assignment PIN_N14 -to SS_CS2 set_location_assignment PIN_L12 -to SS_FC0 set_location_assignment PIN_M12 -to SS_WR0 set_location_assignment PIN_N13 -to SS_CS0 set_location_assignment PIN_C15 -to SS_DATA[4] set_location_assignment PIN_C16 -to SS_DATA[5] set_location_assignment PIN_D15 -to SS_DATA[6] set_location_assignment PIN_D16 -to SS_DATA[7] set_location_assignment PIN_G11 -to SS_DATA[8] set_location_assignment PIN_F14 -to SS_DATA[9] set_location_assignment PIN_F13 -to SS_DATA[10] set_location_assignment PIN_B16 -to SS_DATA[15] set_location_assignment PIN_F15 -to SS_DATA_DIR set_location_assignment PIN_F16 -to SS_TIM2 set_location_assignment PIN_G15 -to SS_TIM1 set_location_assignment PIN_P14 -to SS_ADDR[1] set_location_assignment PIN_N12 -to SS_ADDR[2] set_location_assignment PIN_N11 -to SS_ADDR[3] set_location_assignment PIN_P11 -to SS_ADDR[4] set_location_assignment PIN_M10 -to SS_ADDR[5] set_location_assignment PIN_M9 -to SS_ADDR[6] set_location_assignment PIN_P9 -to SS_ADDR[7] set_location_assignment PIN_R14 -to SS_WAIT set_location_assignment PIN_T15 -to SS_IRQ set_location_assignment PIN_T14 -to SS_LRCK set_location_assignment PIN_T13 -to SS_SD set_location_assignment PIN_R12 -to SS_SSEL set_location_assignment PIN_R13 -to SS_BCK set_location_assignment PIN_T12 -to SS_ADDR[16] set_location_assignment PIN_T11 -to SS_ADDR[21] set_location_assignment PIN_R11 -to SS_ADDR[18] set_location_assignment PIN_L9 -to SS_ADDR[19] set_location_assignment PIN_R10 -to SS_ADDR[20] set_location_assignment PIN_R9 -to SS_ADDR[22] set_location_assignment PIN_T9 -to SS_RST set_location_assignment PIN_D14 -to SS_DATA[11] set_location_assignment PIN_F11 -to SS_DATA[12] set_location_assignment PIN_C14 -to SS_DATA[13] set_location_assignment PIN_A15 -to SS_DATA[14] set_location_assignment PIN_D11 -to ST_AD[2] set_location_assignment PIN_D12 -to ST_MCLK set_location_assignment PIN_B12 -to ST_ADDR[1] set_location_assignment PIN_A13 -to ST_ADDR[2] set_location_assignment PIN_B13 -to ST_AD[0] set_location_assignment PIN_A14 -to ST_AD[1] set_location_assignment PIN_E11 -to ST_RD set_location_assignment PIN_B10 -to ST_AD[13] set_location_assignment PIN_A11 -to ST_AD[14] set_location_assignment PIN_B11 -to ST_AD[15] set_location_assignment PIN_A12 -to ST_ADDR[0] set_location_assignment PIN_C9 -to ST_WAIT set_location_assignment PIN_E9 -to ST_CS set_location_assignment PIN_A4 -to ST_AD[4] set_location_assignment PIN_B5 -to ST_AD[5] set_location_assignment PIN_A5 -to ST_AD[6] set_location_assignment PIN_B6 -to ST_AD[7] set_location_assignment PIN_A6 -to ST_AD[8] set_location_assignment PIN_B7 -to ST_AD[9] set_location_assignment PIN_A7 -to ST_AD[10] set_location_assignment PIN_B8 -to ST_AD[11] set_location_assignment PIN_A8 -to ST_AD[12] set_location_assignment PIN_C8 -to ST_BL1 set_location_assignment PIN_E8 -to ST_BL0 set_location_assignment PIN_C6 -to ST_ADDR[4] set_location_assignment PIN_E7 -to ST_ADDR[3] set_location_assignment PIN_D6 -to ST_ADDR[5] set_location_assignment PIN_D5 -to ST_ADDR[6] set_location_assignment PIN_F1 -to LED0 set_location_assignment PIN_G1 -to LED1 set_location_assignment PIN_M15 -to SS_ADDR[9] set_location_assignment PIN_E16 -to SS_MCLK set_location_assignment PIN_M16 -to SS_SCLK set_location_assignment PIN_N9 -to SS_ADDR[14] set_location_assignment PIN_C11 -to ST_AD[3] set_location_assignment PIN_B9 -to ST_BCK set_location_assignment PIN_A9 -to ST_LRCK set_location_assignment PIN_D9 -to ST_WR set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO" set_location_assignment PIN_G16 -to FPGA_INIT set_location_assignment PIN_T10 -to SS_ADDR[23] set_location_assignment PIN_D8 -to ST_ADDR[7] set_location_assignment PIN_E1 -to ST_CLK set_location_assignment PIN_A2 -to ST_GPIO0 set_location_assignment PIN_B3 -to ST_ALE set_location_assignment PIN_A3 -to ST_GPIO2 set_location_assignment PIN_B4 -to ST_GPIO3 set_location_assignment PIN_A10 -to ST_SDO set_location_assignment PIN_B14 -to SS_DATA_OE set_location_assignment PIN_L10 -to SS_OUTEN set_global_assignment -name ENABLE_INIT_DONE_OUTPUT ON set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF set_global_assignment -name ENABLE_NCE_PIN OFF set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF set_global_assignment -name TRI_STATE_SPI_PINS OFF set_global_assignment -name ENABLE_SIGNALTAP OFF set_global_assignment -name USE_SIGNALTAP_FILE bus.stp set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW" set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)" set_global_assignment -name POST_FLOW_SCRIPT_FILE "quartus_sh:make_jic.tcl" set_global_assignment -name VERILOG_FILE cacheblk.v set_global_assignment -name VERILOG_FILE tsdram.v set_global_assignment -name VERILOG_FILE memhub.v set_global_assignment -name VERILOG_FILE cachebus.v set_global_assignment -name VERILOG_FILE cdcfifo.v set_global_assignment -name SDC_FILE SSMaster.sdc set_global_assignment -name VERILOG_FILE SSMaster.v set_global_assignment -name SIGNALTAP_FILE fsmc.stp set_global_assignment -name SIGNALTAP_FILE ss_abus.stp set_global_assignment -name CDF_FILE ssmaster.cdf set_global_assignment -name QIP_FILE mainpll.qip set_location_assignment PIN_H1 -to EPCS_CLK set_location_assignment PIN_D2 -to EPCS_CS set_location_assignment PIN_C1 -to EPCS_DI set_location_assignment PIN_H2 -to EPCS_DO set_global_assignment -name ENABLE_OCT_DONE OFF set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO" set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO" set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO" set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO" set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top