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To test the RISC-V IOMMU emulation we'll use its PCI representation. Create a new 'riscv-iommu-pci' libqos device that will be present with CONFIG_RISCV_IOMMU. This config is only available for RISC-V, so this device will only be consumed by the RISC-V libqos machine. Start with basic tests: a PCI sanity check and a reset state register test. The reset test was taken from the RISC-V IOMMU spec chapter 5.2, "Reset behavior". More tests will be added later. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Frank Chang <frank.chang@sifive.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241016204038.649340-8-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
76 lines
2.1 KiB
C
76 lines
2.1 KiB
C
/*
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* libqos driver riscv-iommu-pci framework
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*
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* Copyright (c) 2024 Ventana Micro Systems Inc.
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or (at your
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* option) any later version. See the COPYING file in the top-level directory.
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*
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*/
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#include "qemu/osdep.h"
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#include "../libqtest.h"
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#include "qemu/module.h"
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#include "qgraph.h"
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#include "pci.h"
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#include "riscv-iommu.h"
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static void *riscv_iommu_pci_get_driver(void *obj, const char *interface)
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{
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QRISCVIOMMU *r_iommu_pci = obj;
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if (!g_strcmp0(interface, "pci-device")) {
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return &r_iommu_pci->dev;
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}
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fprintf(stderr, "%s not present in riscv_iommu_pci\n", interface);
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g_assert_not_reached();
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}
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static void riscv_iommu_pci_start_hw(QOSGraphObject *obj)
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{
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QRISCVIOMMU *pci = (QRISCVIOMMU *)obj;
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qpci_device_enable(&pci->dev);
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}
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static void riscv_iommu_pci_destructor(QOSGraphObject *obj)
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{
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QRISCVIOMMU *pci = (QRISCVIOMMU *)obj;
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qpci_iounmap(&pci->dev, pci->reg_bar);
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}
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static void *riscv_iommu_pci_create(void *pci_bus, QGuestAllocator *alloc,
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void *addr)
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{
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QRISCVIOMMU *r_iommu_pci = g_new0(QRISCVIOMMU, 1);
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QPCIBus *bus = pci_bus;
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qpci_device_init(&r_iommu_pci->dev, bus, addr);
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r_iommu_pci->reg_bar = qpci_iomap(&r_iommu_pci->dev, 0, NULL);
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r_iommu_pci->obj.get_driver = riscv_iommu_pci_get_driver;
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r_iommu_pci->obj.start_hw = riscv_iommu_pci_start_hw;
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r_iommu_pci->obj.destructor = riscv_iommu_pci_destructor;
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return &r_iommu_pci->obj;
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}
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static void riscv_iommu_pci_register_nodes(void)
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{
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QPCIAddress addr = {
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.vendor_id = RISCV_IOMMU_PCI_VENDOR_ID,
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.device_id = RISCV_IOMMU_PCI_DEVICE_ID,
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.devfn = QPCI_DEVFN(1, 0),
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};
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QOSGraphEdgeOptions opts = {
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.extra_device_opts = "addr=01.0",
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};
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add_qpci_address(&opts, &addr);
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qos_node_create_driver("riscv-iommu-pci", riscv_iommu_pci_create);
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qos_node_produces("riscv-iommu-pci", "pci-device");
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qos_node_consumes("riscv-iommu-pci", "pci-bus", &opts);
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}
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libqos_init(riscv_iommu_pci_register_nodes);
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