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tests/qtest : Add testcase for DM163
`test_dm163_bank()` Checks that the pin "sout" of the DM163 led driver outputs the values received on pin "sin" with the expected latency (depending on the bank). `test_dm163_gpio_connection()` Check that changes to relevant STM32L4x5 GPIO pins are propagated to the DM163 device. Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240424200929.240921-6-ines.varhol@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Inès Varhol
Peter Maydell
parent
49157207c0
commit
a0c325c4b0
2 changed files with 196 additions and 0 deletions
194
tests/qtest/dm163-test.c
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194
tests/qtest/dm163-test.c
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/*
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* QTest testcase for DM163
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*
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* Copyright (C) 2024 Samuel Tardieu <sam@rfc1149.net>
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* Copyright (C) 2024 Arnaud Minier <arnaud.minier@telecom-paris.fr>
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* Copyright (C) 2024 Inès Varhol <ines.varhol@telecom-paris.fr>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "libqtest.h"
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enum DM163_INPUTS {
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SIN = 8,
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DCK = 9,
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RST_B = 10,
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LAT_B = 11,
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SELBK = 12,
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EN_B = 13
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};
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#define DEVICE_NAME "/machine/dm163"
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#define GPIO_OUT(name, value) qtest_set_irq_in(qts, DEVICE_NAME, NULL, name, \
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value)
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#define GPIO_PULSE(name) \
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do { \
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GPIO_OUT(name, 1); \
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GPIO_OUT(name, 0); \
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} while (0)
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static void rise_gpio_pin_dck(QTestState *qts)
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{
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/* Configure output mode for pin PB1 */
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qtest_writel(qts, 0x48000400, 0xFFFFFEB7);
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/* Write 1 in ODR for PB1 */
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qtest_writel(qts, 0x48000414, 0x00000002);
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}
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static void lower_gpio_pin_dck(QTestState *qts)
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{
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/* Configure output mode for pin PB1 */
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qtest_writel(qts, 0x48000400, 0xFFFFFEB7);
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/* Write 0 in ODR for PB1 */
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qtest_writel(qts, 0x48000414, 0x00000000);
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}
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static void rise_gpio_pin_selbk(QTestState *qts)
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{
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/* Configure output mode for pin PC5 */
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qtest_writel(qts, 0x48000800, 0xFFFFF7FF);
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/* Write 1 in ODR for PC5 */
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qtest_writel(qts, 0x48000814, 0x00000020);
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}
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static void lower_gpio_pin_selbk(QTestState *qts)
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{
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/* Configure output mode for pin PC5 */
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qtest_writel(qts, 0x48000800, 0xFFFFF7FF);
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/* Write 0 in ODR for PC5 */
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qtest_writel(qts, 0x48000814, 0x00000000);
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}
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static void rise_gpio_pin_lat_b(QTestState *qts)
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{
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/* Configure output mode for pin PC4 */
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qtest_writel(qts, 0x48000800, 0xFFFFFDFF);
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/* Write 1 in ODR for PC4 */
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qtest_writel(qts, 0x48000814, 0x00000010);
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}
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static void lower_gpio_pin_lat_b(QTestState *qts)
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{
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/* Configure output mode for pin PC4 */
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qtest_writel(qts, 0x48000800, 0xFFFFFDFF);
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/* Write 0 in ODR for PC4 */
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qtest_writel(qts, 0x48000814, 0x00000000);
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}
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static void rise_gpio_pin_rst_b(QTestState *qts)
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{
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/* Configure output mode for pin PC3 */
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qtest_writel(qts, 0x48000800, 0xFFFFFF7F);
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/* Write 1 in ODR for PC3 */
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qtest_writel(qts, 0x48000814, 0x00000008);
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}
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static void lower_gpio_pin_rst_b(QTestState *qts)
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{
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/* Configure output mode for pin PC3 */
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qtest_writel(qts, 0x48000800, 0xFFFFFF7F);
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/* Write 0 in ODR for PC3 */
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qtest_writel(qts, 0x48000814, 0x00000000);
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}
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static void rise_gpio_pin_sin(QTestState *qts)
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{
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/* Configure output mode for pin PA4 */
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qtest_writel(qts, 0x48000000, 0xFFFFFDFF);
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/* Write 1 in ODR for PA4 */
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qtest_writel(qts, 0x48000014, 0x00000010);
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}
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static void lower_gpio_pin_sin(QTestState *qts)
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{
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/* Configure output mode for pin PA4 */
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qtest_writel(qts, 0x48000000, 0xFFFFFDFF);
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/* Write 0 in ODR for PA4 */
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qtest_writel(qts, 0x48000014, 0x00000000);
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}
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static void test_dm163_bank(const void *opaque)
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{
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const unsigned bank = (uintptr_t) opaque;
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const int width = bank ? 192 : 144;
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QTestState *qts = qtest_initf("-M b-l475e-iot01a");
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qtest_irq_intercept_out_named(qts, DEVICE_NAME, "sout");
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GPIO_OUT(RST_B, 1);
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GPIO_OUT(EN_B, 0);
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GPIO_OUT(DCK, 0);
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GPIO_OUT(SELBK, bank);
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GPIO_OUT(LAT_B, 1);
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/* Fill bank with zeroes */
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GPIO_OUT(SIN, 0);
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for (int i = 0; i < width; i++) {
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GPIO_PULSE(DCK);
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}
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/* Fill bank with ones, check that we get the previous zeroes */
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GPIO_OUT(SIN, 1);
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for (int i = 0; i < width; i++) {
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GPIO_PULSE(DCK);
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g_assert(!qtest_get_irq(qts, 0));
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}
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/* Pulse one more bit in the bank, check that we get a one */
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GPIO_PULSE(DCK);
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g_assert(qtest_get_irq(qts, 0));
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qtest_quit(qts);
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}
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static void test_dm163_gpio_connection(void)
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{
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QTestState *qts = qtest_init("-M b-l475e-iot01a");
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qtest_irq_intercept_in(qts, DEVICE_NAME);
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g_assert_false(qtest_get_irq(qts, SIN));
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g_assert_false(qtest_get_irq(qts, DCK));
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g_assert_false(qtest_get_irq(qts, RST_B));
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g_assert_false(qtest_get_irq(qts, LAT_B));
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g_assert_false(qtest_get_irq(qts, SELBK));
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rise_gpio_pin_dck(qts);
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g_assert_true(qtest_get_irq(qts, DCK));
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lower_gpio_pin_dck(qts);
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g_assert_false(qtest_get_irq(qts, DCK));
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rise_gpio_pin_lat_b(qts);
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g_assert_true(qtest_get_irq(qts, LAT_B));
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lower_gpio_pin_lat_b(qts);
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g_assert_false(qtest_get_irq(qts, LAT_B));
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rise_gpio_pin_selbk(qts);
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g_assert_true(qtest_get_irq(qts, SELBK));
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lower_gpio_pin_selbk(qts);
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g_assert_false(qtest_get_irq(qts, SELBK));
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rise_gpio_pin_rst_b(qts);
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g_assert_true(qtest_get_irq(qts, RST_B));
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lower_gpio_pin_rst_b(qts);
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g_assert_false(qtest_get_irq(qts, RST_B));
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rise_gpio_pin_sin(qts);
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g_assert_true(qtest_get_irq(qts, SIN));
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lower_gpio_pin_sin(qts);
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g_assert_false(qtest_get_irq(qts, SIN));
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g_assert_false(qtest_get_irq(qts, DCK));
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g_assert_false(qtest_get_irq(qts, LAT_B));
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g_assert_false(qtest_get_irq(qts, SELBK));
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g_assert_false(qtest_get_irq(qts, RST_B));
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}
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int main(int argc, char **argv)
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{
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g_test_init(&argc, &argv, NULL);
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qtest_add_data_func("/dm163/bank0", (void *)0, test_dm163_bank);
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qtest_add_data_func("/dm163/bank1", (void *)1, test_dm163_bank);
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qtest_add_func("/dm163/gpio_connection", test_dm163_gpio_connection);
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return g_test_run();
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}
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@ -224,6 +224,8 @@ qtests_arm = \
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(config_all_devices.has_key('CONFIG_MICROBIT') ? ['microbit-test'] : []) + \
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(config_all_devices.has_key('CONFIG_STM32L4X5_SOC') ? qtests_stm32l4x5 : []) + \
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(config_all_devices.has_key('CONFIG_FSI_APB2OPB_ASPEED') ? ['aspeed_fsi-test'] : []) + \
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(config_all_devices.has_key('CONFIG_STM32L4X5_SOC') and
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config_all_devices.has_key('CONFIG_DM163')? ['dm163-test'] : []) + \
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['arm-cpu-features',
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'boot-serial-test']
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