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x86/PCI: Use generic pci_mmap_resource_range()
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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2 changed files with 1 additions and 48 deletions
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@ -104,6 +104,7 @@ int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);
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#define HAVE_PCI_MMAP
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#define HAVE_PCI_MMAP
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#define arch_can_pci_mmap_wc() pat_enabled()
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#define arch_can_pci_mmap_wc() pat_enabled()
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#define ARCH_GENERIC_PCI_MMAP_RESOURCE
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#ifdef CONFIG_PCI
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#ifdef CONFIG_PCI
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extern void early_quirks(void);
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extern void early_quirks(void);
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@ -406,51 +406,3 @@ void __init pcibios_resource_survey(void)
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*/
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*/
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ioapic_insert_resources();
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ioapic_insert_resources();
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}
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}
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static const struct vm_operations_struct pci_mmap_ops = {
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.access = generic_access_phys,
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};
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int pci_mmap_page_range(struct pci_dev *dev, int bar,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine)
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{
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unsigned long prot;
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/* I/O space cannot be accessed via normal processor loads and
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* stores on this platform.
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*/
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if (mmap_state == pci_mmap_io)
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return -EINVAL;
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prot = pgprot_val(vma->vm_page_prot);
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/*
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* Return error if pat is not enabled and write_combine is requested.
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* Caller can followup with UC MINUS request and add a WC mtrr if there
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* is a free mtrr slot.
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*/
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if (!pat_enabled() && write_combine)
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return -EINVAL;
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if (pat_enabled() && write_combine)
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prot |= cachemode2protval(_PAGE_CACHE_MODE_WC);
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else if (pat_enabled() || boot_cpu_data.x86 > 3)
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/*
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* ioremap() and ioremap_nocache() defaults to UC MINUS for now.
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* To avoid attribute conflicts, request UC MINUS here
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* as well.
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*/
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prot |= cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS);
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vma->vm_page_prot = __pgprot(prot);
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if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
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vma->vm_end - vma->vm_start,
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vma->vm_page_prot))
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return -EAGAIN;
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vma->vm_ops = &pci_mmap_ops;
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return 0;
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}
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