From 1a0c6c9b58fa6e27be1ae2a5549a174ddd287ee7 Mon Sep 17 00:00:00 2001 From: SwtcR Date: Sun, 11 Feb 2018 06:07:39 +0900 Subject: [PATCH] tegra210: set PWM to use PLLP --- drivers/clk/tegra/clk-tegra210.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c index 7fdb9b79d499..7adbef509885 100644 --- a/drivers/clk/tegra/clk-tegra210.c +++ b/drivers/clk/tegra/clk-tegra210.c @@ -3366,6 +3366,7 @@ static struct tegra_clk_init_table init_table[] __initdata = { { TEGRA210_CLK_DSIBLP, TEGRA210_CLK_PLL_P, 68000000, 0 }, { TEGRA210_CLK_DISP1, TEGRA210_CLK_PLL_D_OUT0, 0, 0 }, { TEGRA210_CLK_DISP2, TEGRA210_CLK_PLL_D_OUT0, 0, 0 }, + { TEGRA210_CLK_PWM, TEGRA210_CLK_PLL_P, 48000000, 0 }, /* This MUST be the last entry. */ { TEGRA210_CLK_CLK_MAX, TEGRA210_CLK_CLK_MAX, 0, 0 }, };