Lionel Flandrin
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3c0a6e06d5
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Tweak IRQ read to match mednafen
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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48d7fd63c1
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Added GDB helper script
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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85843150ac
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Improve debugger interface
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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39168f8dd8
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gitlab-ci: don't allow clippy failure
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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991073d48c
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Imported Rustation's debugger with GDB TCP interface
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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b7c04558a2
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Add proper logging facilities
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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78464d15e9
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Implemented debugger interface
No debugger backend yet.
The interface is hidden behind the "debugger" feature, disabled by
default for performance reasons.
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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5c523234cb
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Implement exception where they weren't handled
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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c1f7b5e9b5
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Implement exceptions, SYSCALL and BREAK
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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76d9f57954
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Enable optimizations even for non-release builds
The emulator will soon become unusable without optimizations anyway.
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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f677a9ab60
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Implement timer registers
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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c495f57dae
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Implement MFHI, MTHI, MFLO, MTLO
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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ab76637ad0
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Implement MULT, MULTU, DIV and DIVU
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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c719acbcc9
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Implement SRL, SRA, SLLV, SRLV and SRAV
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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7960f414d5
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Implement SLT, SLTI and SLTIU
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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a3cdfcbf7e
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Remove CPU state dump after every cycle
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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ff613a260a
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Implement BXX
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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371fbd44c4
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Implement IRQ registers
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2020-01-07 01:27:39 +00:00 |
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Lionel Flandrin
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aad56c9a7d
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Implement ADD, SUB and SUBU
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2020-01-07 01:27:37 +00:00 |
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Lionel Flandrin
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cfdb8aa438
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Implement AND, XOR and NOR
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2019-12-31 20:47:00 +00:00 |
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Lionel Flandrin
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a3fd1e7f1b
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Implement MFC0
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2019-12-31 20:47:00 +00:00 |
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Lionel Flandrin
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8cb68dcbad
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Implement (empty) Expansion 1
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2019-12-31 20:47:00 +00:00 |
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Lionel Flandrin
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a5ea4c6c85
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Implement BEQ, BLEZ and BGTZ
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2019-12-31 20:47:00 +00:00 |
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Lionel Flandrin
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1745f0b3f0
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Implement LB, LH, LBU and LHU
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2019-12-31 20:47:00 +00:00 |
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Lionel Flandrin
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01979e3c85
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Implement JR and JALR
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2019-12-31 20:47:00 +00:00 |
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Lionel Flandrin
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0c65668ad0
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Ignore writes to Expansion 2
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2019-12-31 20:47:00 +00:00 |
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Lionel Flandrin
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a7d01808f3
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Implement ANDI and XORI
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2019-12-31 20:47:00 +00:00 |
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Lionel Flandrin
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a0471deadf
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Implement JAL
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2019-12-31 20:47:00 +00:00 |
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Lionel Flandrin
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7a0d58d448
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Implement SPU register interface
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2019-12-31 20:47:00 +00:00 |
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Lionel Flandrin
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f2870065b9
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Implement SB and SH
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2019-12-31 20:47:00 +00:00 |
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Lionel Flandrin
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cccbeb3a72
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Implement ADDU
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2019-12-31 20:47:00 +00:00 |
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Lionel Flandrin
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7524e6b124
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Implement SLTU
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2019-12-31 20:47:00 +00:00 |
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Lionel Flandrin
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bcf5e49102
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Implement RAM
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2019-12-31 20:46:58 +00:00 |
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Lionel Flandrin
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e1fad5767d
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Implement LW and load delay slots
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2019-12-30 20:20:38 +00:00 |
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Lionel Flandrin
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02c635360e
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Implement ADDI
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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97f25d4f71
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Implement BNE
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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76a9776648
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Implement cache isolation
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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0998d66029
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Implement MTC0
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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078af9b390
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Implement COP0 instruction decoding
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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69daf8cec8
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Implemented CACHE_CONTROL register
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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ba67444773
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Implemented OR
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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803332124c
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Implemented J and branch delay slots
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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491b3a74e0
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Implemented RAM_SIZE register
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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dd03fbf32c
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Implemented ADDIU
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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333ff020ad
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Implement SLL
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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8470d3f41a
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Implement MEM_CONTROL registers
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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66175a048d
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Implement SW
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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acf2b4adee
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Implement ORI
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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2c3062e720
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Implement LUI
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2019-12-29 20:40:25 +00:00 |
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Lionel Flandrin
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2564a84f20
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Implement instruction decoding framework
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2019-12-29 20:40:25 +00:00 |
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