0xCC004000 - MI (memory protection interface).

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Overview 
---------

Protection can be enabled only for pages (page size is 1024 bytes), as example:

addr = 0x80EFEFEF, page = 0x3BFB, or

100000 0011101111111011 1111101111
       |
       -- this is page number

Supported types of protection :
    0 - access denied
    1 - read only
    2 - write only
    3 - read / write (no protection, full access)

You can specify only 4 protected regions of memory. External interrupt will be
signaled, if CPU try to access protected region. Because of its allowed
to enable protection only for 4 regions, there are total 4 possible interrupts.
They are called : MEM_0, MEM_1, MEM_2 and MEM_3.


Hardware registers
-------------------

0xCC004000...0xCC00400F - keeping ranges for 4 protected regions :

// 0xCC004000 (N like to call the regions as "channels")
struct
{
    u16     pageLo, pageHi;
} MEM_CHAN[4];

0xCC004010 - keeping protection type for each of 4 chans. each 2 bits containing
             type of the protection (see above).

  ------------------------
 | bits | 0 1 2 3 4 5 6 7 |    (big-endian)
 |------|-----------------|
 | chan | [3] [2] [1] [0] |
  ------------------------

0xCC00401C      MI interrupt mask :

  ------------------------
 | bits | 0 1 2 3 4 5 6 7 |    (big-endian)
 |------|-----------------|
 | desc |       M 3 2 1 0 |
  ------------------------ 

  0     - mask MEM0 interrupt (1 - enable)
  1     - mask MEM1 interrupt
  2     - mask MEM2 interrupt
  3     - mask MEM3 interrupt
  M     - mask all MI interrupts

  1 - enable, 0 - disable. other bits unused.

0xCC00401E      interrupt cause. bit layout same as interrupt mask.

0xCC004020      assume to be zero, after init, and should be cleared by
                interrupt handler.
                
0xCC004022      theese are used inside interrupt handler. seems to contain
0xCC004024      address, which failed protection rules. need to check on real GC

0xCC004028      2 after init, if RAM size is exactly 24MB.

(all registers are 16-bit only)


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