mirror of
https://github.com/hrydgard/ppsspp.git
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137 lines
No EOL
2.8 KiB
C++
137 lines
No EOL
2.8 KiB
C++
#include "Common/ChunkFile.h"
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#include "Core/Core.h"
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#include "Core/CoreTiming.h"
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#include "Core/MIPS/MIPS.h"
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#include "Core/MIPS/MIPSCodeUtils.h"
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#include "Core/MIPS/MIPSInt.h"
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#include "Core/MIPS/MIPSTables.h"
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#include "PpcRegCache.h"
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#include "ppcEmitter.h"
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#include "PpcJit.h"
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using namespace MIPSAnalyst;
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#define _RS ((op>>21) & 0x1F)
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#define _RT ((op>>16) & 0x1F)
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#define _RD ((op>>11) & 0x1F)
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#define _FS ((op>>11) & 0x1F)
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#define _FT ((op>>16) & 0x1F)
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#define _FD ((op>>6 ) & 0x1F)
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#define _SA ((op>>6 ) & 0x1F)
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#define _POS ((op>>6 ) & 0x1F)
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#define _SIZE ((op>>11 ) & 0x1F)
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// All functions should have CONDITIONAL_DISABLE, so we can narrow things down to a file quickly.
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// Currently known non working ones should have DISABLE.
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//#define CONDITIONAL_DISABLE { Comp_Generic(op); return; }
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#define CONDITIONAL_DISABLE ;
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#define DISABLE { Comp_Generic(op); return; }
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namespace MIPSComp
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{
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static u32 EvalOr(u32 a, u32 b) { return a | b; }
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static u32 EvalEor(u32 a, u32 b) { return a ^ b; }
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static u32 EvalAnd(u32 a, u32 b) { return a & b; }
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static u32 EvalAdd(u32 a, u32 b) { return a + b; }
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static u32 EvalSub(u32 a, u32 b) { return a - b; }
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void Jit::Comp_IType(u32 op)
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{
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CONDITIONAL_DISABLE;
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s32 simm = (s32)(s16)(op & 0xFFFF); // sign extension
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u32 uimm = op & 0xFFFF;
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u32 suimm = (u32)(s32)simm;
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int rt = _RT;
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int rs = _RS;
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// noop, won't write to ZERO.
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if (rt == 0)
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return;
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switch (op >> 26)
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{
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case 8: // same as addiu?
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case 9: // R(rt) = R(rs) + simm; break; //addiu
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{
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if (gpr.IsImm(rs)) {
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gpr.SetImm(rt, gpr.GetImm(rs) + simm);
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} else {
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gpr.MapDirtyIn(rt, rs);
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ADDI(gpr.R(rt), gpr.R(rs), simm);
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}
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break;
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}
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case 15: // R(rt) = uimm << 16; //lui
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gpr.SetImm(rt, uimm << 16);
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break;
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default:
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Comp_Generic(op);
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break;
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}
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}
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void Jit::Comp_RType2(u32 op) {
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Comp_Generic(op);
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}
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void Jit::Comp_RType3(u32 op) {
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#if 0
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CONDITIONAL_DISABLE;
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int rt = _RT;
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int rs = _RS;
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int rd = _RD;
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// noop, won't write to ZERO.
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if (rd == 0)
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return;
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switch (op & 63)
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{
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case 32: //R(rd) = R(rs) + R(rt); break; //add
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case 33: //R(rd) = R(rs) + R(rt); break; //addu
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// Some optimized special cases
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if (gpr.IsImm(rs) && gpr.GetImm(rs) == 0) {
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gpr.MapDirtyIn(rd, rt);
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MR(gpr.R(rd), gpr.R(rt));
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} else if (gpr.IsImm(rt) && gpr.GetImm(rt) == 0) {
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gpr.MapDirtyIn(rd, rs);
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MR(gpr.R(rd), gpr.R(rs));
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} else {
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CompType3(rd, rs, rt, &ARMXEmitter::ADD, &EvalAdd);
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}
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break;
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default:
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Comp_Generic(op);
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break;
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}
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#else
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Comp_Generic(op);
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#endif
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}
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void Jit::Comp_ShiftType(u32 op) {
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Comp_Generic(op);
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}
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void Jit::Comp_Allegrex(u32 op) {
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Comp_Generic(op);
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}
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void Jit::Comp_Allegrex2(u32 op) {
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Comp_Generic(op);
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}
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void Jit::Comp_MulDivType(u32 op) {
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Comp_Generic(op);
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}
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void Jit::Comp_Special3(u32 op) {
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Comp_Generic(op);
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}
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} |