ppsspp/Core/MIPS/x86
Unknown W. Brackets e639f8d15f Handle branches in VFPU delay slots better.
Based on tests on a PSP, all branches are attempted.  The behavior is
technically undefined.

It seems to take the delay slot's target if they differ and both pass.
This is the behavior the interpreter has, but it's more work in jit.

Since only a couple games seem to do this, and clearly expect this
behavior, this fixes all known cases of #1926.
2013-08-14 22:56:02 -07:00
..
Asm.cpp JIT: Get rid of one memory access per dispatch, and get rid of blockcodepointers. 2013-04-27 01:32:03 +02:00
Asm.h More armjit work 2013-01-08 00:26:42 +01:00
CompALU.cpp Handle the immediate case of clz/clo. 2013-07-04 23:07:42 -07:00
CompBranch.cpp Handle branches in VFPU delay slots better. 2013-08-14 22:56:02 -07:00
CompFPU.cpp Oops, XMM0 might be taken by temps. Also, s/GC_ALIGN16/MEMORY_ALIGN16 2013-08-10 23:39:24 +02:00
CompLoadStore.cpp Fix memchecks for halfwords and bytes. 2013-07-06 13:15:48 -07:00
CompVFPU.cpp Minor optimization, sketch on an lvl.q jit implementation 2013-08-11 22:12:15 +02:00
Jit.cpp Make sure we're reporting unknown instructions. 2013-08-11 18:20:43 -07:00
Jit.h A small optimization, a few jit stubs, and cross/quat product on x86. 2013-08-01 00:15:08 +02:00
RegCache.cpp Only flush the required registers on function calls (only implemented for real on ARM) 2013-07-28 22:21:43 +02:00
RegCache.h Only flush the required registers on function calls (only implemented for real on ARM) 2013-07-28 22:21:43 +02:00
RegCacheFPU.cpp Fix some warnings generated by clang. 2013-02-24 10:23:31 -08:00
RegCacheFPU.h Try to reuse temp regs for better caching. 2013-02-18 00:32:42 -08:00