mirror of
https://github.com/hrydgard/ppsspp.git
synced 2025-04-02 11:01:50 -04:00
145 lines
5.1 KiB
C++
145 lines
5.1 KiB
C++
// Copyright (c) 2023- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#pragma once
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#include <string>
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#include <vector>
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#include "Common/RiscVEmitter.h"
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#include "Core/MIPS/IR/IRJit.h"
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#include "Core/MIPS/IR/IRNativeCommon.h"
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#include "Core/MIPS/JitCommon/JitState.h"
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#include "Core/MIPS/JitCommon/JitCommon.h"
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#include "Core/MIPS/RiscV/RiscVRegCache.h"
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namespace MIPSComp {
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class RiscVJitBackend : public RiscVGen::RiscVCodeBlock, public IRNativeBackend {
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public:
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RiscVJitBackend(JitOptions &jo, IRBlockCache &blocks);
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~RiscVJitBackend();
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bool DescribeCodePtr(const u8 *ptr, std::string &name) const override;
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void GenerateFixedCode(MIPSState *mipsState) override;
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bool CompileBlock(IRBlockCache *irBlockCache, int block_num, bool preload) override;
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void ClearAllBlocks() override;
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void InvalidateBlock(IRBlockCache *irBlockCache, int block_num) override;
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protected:
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const CodeBlockCommon &CodeBlock() const override {
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return *this;
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}
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private:
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void RestoreRoundingMode(bool force = false);
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void ApplyRoundingMode(bool force = false);
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void MovFromPC(RiscVGen::RiscVReg r);
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void MovToPC(RiscVGen::RiscVReg r);
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void WriteDebugPC(uint32_t pc);
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void WriteDebugPC(RiscVGen::RiscVReg r);
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void WriteDebugProfilerStatus(IRProfilerStatus status);
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void SaveStaticRegisters();
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void LoadStaticRegisters();
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// Note: destroys SCRATCH1.
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void FlushAll();
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void WriteConstExit(uint32_t pc);
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void OverwriteExit(int srcOffset, int len, int block_num) override;
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void CompIR_Arith(IRInst inst) override;
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void CompIR_Assign(IRInst inst) override;
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void CompIR_Basic(IRInst inst) override;
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void CompIR_Bits(IRInst inst) override;
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void CompIR_Breakpoint(IRInst inst) override;
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void CompIR_Compare(IRInst inst) override;
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void CompIR_CondAssign(IRInst inst) override;
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void CompIR_CondStore(IRInst inst) override;
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void CompIR_Div(IRInst inst) override;
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void CompIR_Exit(IRInst inst) override;
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void CompIR_ExitIf(IRInst inst) override;
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void CompIR_FArith(IRInst inst) override;
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void CompIR_FAssign(IRInst inst) override;
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void CompIR_FCompare(IRInst inst) override;
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void CompIR_FCondAssign(IRInst inst) override;
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void CompIR_FCvt(IRInst inst) override;
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void CompIR_FLoad(IRInst inst) override;
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void CompIR_FRound(IRInst inst) override;
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void CompIR_FSat(IRInst inst) override;
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void CompIR_FSpecial(IRInst inst) override;
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void CompIR_FStore(IRInst inst) override;
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void CompIR_Generic(IRInst inst) override;
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void CompIR_HiLo(IRInst inst) override;
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void CompIR_Interpret(IRInst inst) override;
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void CompIR_Load(IRInst inst) override;
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void CompIR_LoadShift(IRInst inst) override;
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void CompIR_Logic(IRInst inst) override;
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void CompIR_Mult(IRInst inst) override;
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void CompIR_RoundingMode(IRInst inst) override;
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void CompIR_Shift(IRInst inst) override;
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void CompIR_Store(IRInst inst) override;
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void CompIR_StoreShift(IRInst inst) override;
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void CompIR_System(IRInst inst) override;
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void CompIR_Transfer(IRInst inst) override;
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void CompIR_VecArith(IRInst inst) override;
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void CompIR_VecAssign(IRInst inst) override;
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void CompIR_VecClamp(IRInst inst) override;
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void CompIR_VecHoriz(IRInst inst) override;
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void CompIR_VecLoad(IRInst inst) override;
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void CompIR_VecPack(IRInst inst) override;
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void CompIR_VecStore(IRInst inst) override;
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void CompIR_ValidateAddress(IRInst inst) override;
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void SetScratch1ToSrc1Address(IRReg src1);
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// Modifies SCRATCH regs.
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int32_t AdjustForAddressOffset(RiscVGen::RiscVReg *reg, int32_t constant, int32_t range = 0);
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void NormalizeSrc1(IRInst inst, RiscVGen::RiscVReg *reg, RiscVGen::RiscVReg tempReg, bool allowOverlap);
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void NormalizeSrc12(IRInst inst, RiscVGen::RiscVReg *lhs, RiscVGen::RiscVReg *rhs, RiscVGen::RiscVReg lhsTempReg, RiscVGen::RiscVReg rhsTempReg, bool allowOverlap);
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RiscVGen::RiscVReg NormalizeR(IRReg rs, IRReg rd, RiscVGen::RiscVReg tempReg);
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JitOptions &jo;
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RiscVRegCache regs_;
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const u8 *outerLoop_ = nullptr;
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const u8 *outerLoopPCInSCRATCH1_ = nullptr;
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const u8 *dispatcherCheckCoreState_ = nullptr;
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const u8 *dispatcherPCInSCRATCH1_ = nullptr;
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const u8 *dispatcherNoCheck_ = nullptr;
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const u8 *applyRoundingMode_ = nullptr;
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const u8 *saveStaticRegisters_ = nullptr;
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const u8 *loadStaticRegisters_ = nullptr;
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int jitStartOffset_ = 0;
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int compilingBlockNum_ = -1;
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int logBlocks_ = 0;
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};
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class RiscVJit : public IRNativeJit {
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public:
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RiscVJit(MIPSState *mipsState)
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: IRNativeJit(mipsState), rvBackend_(jo, blocks_) {
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Init(rvBackend_);
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}
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private:
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RiscVJitBackend rvBackend_;
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};
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} // namespace MIPSComp
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