ppsspp/Core/MIPS/IR
Unknown W. Brackets 905d2c2da6 irjit: Cleanup some invalid op handling.
And log blocks the same way as other backends.
2018-01-01 08:38:11 -08:00
..
IRAsm.cpp Initial commit for IRJit 2016-05-07 13:58:29 +02:00
IRCompALU.cpp irjit: Cleanup some invalid op handling. 2018-01-01 08:38:11 -08:00
IRCompBranch.cpp Jit: Fix syscall outside delay slot. 2017-06-04 10:39:01 -07:00
IRCompFPU.cpp irjit: Cleanup some invalid op handling. 2018-01-01 08:38:11 -08:00
IRCompLoadStore.cpp irjit: Cleanup some invalid op handling. 2018-01-01 08:38:11 -08:00
IRCompVFPU.cpp irjit: Cleanup some invalid op handling. 2018-01-01 08:38:11 -08:00
IRFrontend.cpp irjit: Cleanup some invalid op handling. 2018-01-01 08:38:11 -08:00
IRFrontend.h jit: Report blocks with uneaten VFPU prefixes. 2018-01-01 08:38:10 -08:00
IRInst.cpp jit-ir: Implement memory breakpoints. 2016-07-02 16:38:30 -07:00
IRInst.h symbian: Remove! 2016-10-11 18:49:08 +02:00
IRInterpreter.cpp irjit: Allow continuing from mips break. 2017-12-25 10:21:22 -08:00
IRInterpreter.h jit-ir: Implement bit reverse instruction. 2016-05-14 18:21:42 -07:00
IRJit.cpp jit: Report blocks with uneaten VFPU prefixes. 2018-01-01 08:38:10 -08:00
IRJit.h irjit: Speed up icache block invalidation. 2017-12-31 10:37:09 -08:00
IRPassSimplify.cpp Attempts to counter crashes seen in the Google Play developer console 2016-12-01 22:07:03 +01:00
IRPassSimplify.h jit-ir: Add load/store reorder and merge passes. 2016-05-17 21:24:13 -07:00
IRRegCache.cpp jit-ir: Less instructions cause flushing in constant propagation. 2016-05-08 23:25:08 +02:00
IRRegCache.h jit-ir: Less instructions cause flushing in constant propagation. 2016-05-08 23:25:08 +02:00