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85 lines
2.7 KiB
C++
85 lines
2.7 KiB
C++
// Copyright (c) 2015- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include "Core/MemMap.h"
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#include "Core/MIPS/MIPS.h"
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#include "Core/System.h"
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#include "Core/CoreTiming.h"
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#include "Common/MemoryUtil.h"
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#include "Common/CPUDetect.h"
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#include "Common/Arm64Emitter.h"
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#include "Core/MIPS/ARM64/Arm64Jit.h"
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#include "Core/MIPS/ARM64/Arm64Asm.h"
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#include "Core/MIPS/JitCommon/JitCommon.h"
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using namespace Arm64Gen;
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//static int temp32; // unused?
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static const bool enableDebug = false;
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//static bool enableStatistics = false; //unused?
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//The standard ARM calling convention allocates the 16 ARM registers as:
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// r15 is the program counter.
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// r14 is the link register. (The BL instruction, used in a subroutine call, stores the return address in this register).
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// r13 is the stack pointer. (The Push/Pop instructions in "Thumb" operating mode use this register only).
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// r12 is the Intra-Procedure-call scratch register.
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// r4 to r11: used to hold local variables.
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// r0 to r3: used to hold argument values passed to a subroutine, and also hold results returned from a subroutine.
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// Mappable registers:
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// R2, R3, R4, R5, R6, R8, R11
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// STATIC ALLOCATION ARM:
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// R10 : MIPS state
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// R11 : Memory base pointer.
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// R7 : Down counter
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extern volatile CoreState coreState;
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void ShowPC(u32 sp) {
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if (currentMIPS) {
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ERROR_LOG(JIT, "ShowPC : %08x ArmSP : %08x", currentMIPS->pc, sp);
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} else {
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ERROR_LOG(JIT, "Universe corrupt?");
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}
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}
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void DisassembleArm(const u8 *data, int size);
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// PLAN: no more block numbers - crazy opcodes just contain offset within
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// dynarec buffer
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// At this offset - 4, there is an int specifying the block number.
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namespace MIPSComp {
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using namespace Arm64JitConstants;
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void Arm64Jit::GenerateFixedCode()
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{
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// Uncomment if you want to see the output...
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// INFO_LOG(JIT, "THE DISASM ========================");
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// DisassembleArm(enterCode, GetCodePtr() - enterCode);
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// INFO_LOG(JIT, "END OF THE DISASM ========================");
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// Don't forget to zap the instruction cache!
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FlushIcache();
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}
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} // namespace MIPSComp
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