mirror of
https://github.com/hrydgard/ppsspp.git
synced 2025-04-02 11:01:50 -04:00
630 lines
14 KiB
C++
630 lines
14 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include "DisassemblyManager.h"
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#include "DebugInterface.h"
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#include "Core/Debugger/SymbolMap.h"
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#include "Core/MIPS/MIPSCodeUtils.h"
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#include "Core/MIPS/MIPSTables.h"
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#include "Common/Common.h"
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#include "ext/xxhash.h"
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#include <algorithm>
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std::map<u32,DisassemblyEntry*> DisassemblyManager::entries;
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DebugInterface* DisassemblyManager::cpu;
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bool isInInterval(u32 start, u32 size, u32 value)
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{
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return start <= value && value < start+size;
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}
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void parseDisasm(const char* disasm, char* opcode, char* arguments, bool insertSymbols)
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{
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// copy opcode
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while (*disasm != 0 && *disasm != '\t')
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{
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*opcode++ = *disasm++;
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}
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*opcode = 0;
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if (*disasm++ == 0)
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{
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*arguments = 0;
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return;
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}
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const char* jumpAddress = strstr(disasm,"->$");
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const char* jumpRegister = strstr(disasm,"->");
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while (*disasm != 0)
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{
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// parse symbol
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if (disasm == jumpAddress)
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{
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u32 branchTarget;
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sscanf(disasm+3,"%08x",&branchTarget);
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const char* addressSymbol = DisassemblyManager::getCpu()->findSymbolForAddress(branchTarget);
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if (addressSymbol != NULL && insertSymbols)
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{
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arguments += sprintf(arguments,"%s",addressSymbol);
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} else {
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arguments += sprintf(arguments,"0x%08X",branchTarget);
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}
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disasm += 3+8;
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continue;
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}
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if (disasm == jumpRegister)
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disasm += 2;
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if (*disasm == ' ')
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{
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disasm++;
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continue;
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}
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*arguments++ = *disasm++;
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}
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*arguments = 0;
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}
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std::map<u32,DisassemblyEntry*>::iterator findDisassemblyEntry(std::map<u32,DisassemblyEntry*>& entries, u32 address, bool exact)
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{
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if (exact)
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return entries.find(address);
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if (entries.size() == 0)
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return entries.end();
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// find first elem that's >= address
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auto it = entries.lower_bound(address);
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if (it != entries.end())
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{
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// it may be an exact match
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if (isInInterval(it->second->getLineAddress(0),it->second->getTotalSize(),address))
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return it;
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// otherwise it may point to the next
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if (it != entries.begin())
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{
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it--;
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if (isInInterval(it->second->getLineAddress(0),it->second->getTotalSize(),address))
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return it;
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}
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}
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// check last entry manually
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auto rit = entries.rbegin();
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if (isInInterval(rit->second->getLineAddress(0),rit->second->getTotalSize(),address))
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{
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return (++rit).base();
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}
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// no match otherwise
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return entries.end();
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}
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void DisassemblyManager::analyze(u32 address, u32 size = 1024)
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{
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u32 end = address+size;
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address &= ~3;
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u32 start = address;
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while (address < end && start <= address)
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{
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auto it = findDisassemblyEntry(entries,address,false);
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if (it != entries.end())
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{
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DisassemblyEntry* entry = it->second;
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entry->recheck();
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address = entry->getLineAddress(0)+entry->getTotalSize();
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continue;
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}
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SymbolInfo info;
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if (symbolMap.GetSymbolInfo(&info,address))
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{
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DisassemblyFunction* function = new DisassemblyFunction(info.address,info.size);
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entries[info.address] = function;
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address = info.address+info.size;
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} else {
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u32 next = symbolMap.GetNextSymbolAddress(address);
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// let's just assume anything otuside a function is a normal opcode
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DisassemblyOpcode* opcode = new DisassemblyOpcode(address,(next-address)/4);
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entries[address] = opcode;
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address = next;
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}
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}
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}
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std::vector<BranchLine> DisassemblyManager::getBranchLines(u32 start, u32 size)
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{
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std::vector<BranchLine> result;
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auto it = findDisassemblyEntry(entries,start,false);
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if (it != entries.end())
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{
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do
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{
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it->second->getBranchLines(start,size,result);
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it++;
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} while (it != entries.end() && start+size > it->second->getLineAddress(0));
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}
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return result;
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}
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void DisassemblyManager::getLine(u32 address, bool insertSymbols, DisassemblyLineInfo& dest)
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{
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auto it = findDisassemblyEntry(entries,address,false);
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if (it == entries.end())
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{
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analyze(address);
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it = findDisassemblyEntry(entries,address,false);
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if (it == entries.end())
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{
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dest.totalSize = 4;
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dest.name = "ERROR";
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dest.params = "Disassembly failure";
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return;
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}
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}
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DisassemblyEntry* entry = it->second;
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dest.info = MIPSAnalyst::GetOpcodeInfo(cpu,address);
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if (entry->disassemble(address,dest,insertSymbols))
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return;
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dest.totalSize = 4;
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dest.name = "ERROR";
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dest.params = "Disassembly failure";
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}
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u32 DisassemblyManager::getStartAddress(u32 address)
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{
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auto it = findDisassemblyEntry(entries,address,false);
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if (it == entries.end())
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{
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analyze(address);
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it = findDisassemblyEntry(entries,address,false);
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if (it == entries.end())
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return address;
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}
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DisassemblyEntry* entry = it->second;
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int line = entry->getLineNum(address,true);
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return entry->getLineAddress(line);
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}
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u32 DisassemblyManager::getNthPreviousAddress(u32 address, int n)
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{
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while (Memory::IsValidAddress(address))
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{
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auto it = findDisassemblyEntry(entries,address,false);
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while (it != entries.end())
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{
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DisassemblyEntry* entry = it->second;
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int oldLineNum = entry->getLineNum(address,true);
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int oldNumLines = entry->getNumLines();
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if (n <= oldLineNum)
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{
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return entry->getLineAddress(oldLineNum-n);
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}
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address = entry->getLineAddress(0)-1;
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n -= oldLineNum+1;
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it = findDisassemblyEntry(entries,address,false);
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}
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analyze(address-127,128);
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}
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return address-n*4;
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}
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u32 DisassemblyManager::getNthNextAddress(u32 address, int n)
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{
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while (Memory::IsValidAddress(address))
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{
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auto it = findDisassemblyEntry(entries,address,false);
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while (it != entries.end())
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{
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DisassemblyEntry* entry = it->second;
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int oldLineNum = entry->getLineNum(address,true);
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int oldNumLines = entry->getNumLines();
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if (oldLineNum+n < oldNumLines)
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{
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return entry->getLineAddress(oldLineNum+n);
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}
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address = entry->getLineAddress(0)+entry->getTotalSize();
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n -= (oldNumLines-oldLineNum);
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it = findDisassemblyEntry(entries,address,false);
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}
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analyze(address);
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}
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return address+n*4;
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}
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void DisassemblyManager::clear()
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{
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for (auto it = entries.begin(); it != entries.end(); it++)
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{
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delete it->second;
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}
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entries.clear();
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}
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DisassemblyFunction::DisassemblyFunction(u32 _address, u32 _size): address(_address), size(_size)
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{
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hash = computeHash();
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load();
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}
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u32 DisassemblyFunction::computeHash()
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{
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return XXH32(Memory::GetPointer(address),size,0xBACD7814);
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}
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void DisassemblyFunction::recheck()
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{
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u32 newHash = computeHash();
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if (hash != newHash)
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{
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hash = newHash;
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clear();
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load();
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}
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}
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int DisassemblyFunction::getNumLines()
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{
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return lineAddresses.size();
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}
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int DisassemblyFunction::getLineNum(u32 address, bool findStart)
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{
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for (int i = 0; i < lineAddresses.size(); i++)
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{
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u32 next = (i == lineAddresses.size()-1) ? this->address+this->size : lineAddresses[i+1];
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if (lineAddresses[i] == address)
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return i;
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if (findStart && lineAddresses[i] <= address && next > address)
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return i;
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}
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return 0;
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}
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u32 DisassemblyFunction::getLineAddress(int line)
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{
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return lineAddresses[line];
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}
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bool DisassemblyFunction::disassemble(u32 address, DisassemblyLineInfo& dest, bool insertSymbols)
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{
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auto it = findDisassemblyEntry(entries,address,false);
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if (it == entries.end())
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return false;
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return it->second->disassemble(address,dest,insertSymbols);
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}
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void DisassemblyFunction::getBranchLines(u32 start, u32 size, std::vector<BranchLine>& dest)
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{
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for (int i = 0; i < lines.size(); i++)
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{
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dest.push_back(lines[i]);
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}
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}
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#define NUM_LANES 16
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void DisassemblyFunction::generateBranchLines()
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{
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struct LaneInfo
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{
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bool used;
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u32 end;
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};
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LaneInfo lanes[NUM_LANES];
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for (int i = 0; i < NUM_LANES; i++)
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lanes[i].used = false;
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u32 end = address+size;
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DebugInterface* cpu = DisassemblyManager::getCpu();
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for (u32 funcPos = address; funcPos < end; funcPos += 4)
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{
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MIPSAnalyst::MipsOpcodeInfo opInfo = MIPSAnalyst::GetOpcodeInfo(cpu,funcPos);
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bool inFunction = (opInfo.branchTarget >= address && opInfo.branchTarget < end);
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if (opInfo.isBranch && !opInfo.isBranchToRegister && !opInfo.isLinkedBranch && inFunction)
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{
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BranchLine line;
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if (opInfo.branchTarget < funcPos)
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{
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line.first = opInfo.branchTarget;
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line.second = funcPos;
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line.type = LINE_UP;
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} else {
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line.first = funcPos;
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line.second = opInfo.branchTarget;
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line.type = LINE_DOWN;
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}
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lines.push_back(line);
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}
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}
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std::sort(lines.begin(),lines.end());
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for (size_t i = 0; i < lines.size(); i++)
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{
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for (int l = 0; l < NUM_LANES; l++)
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{
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if (lines[i].first > lanes[l].end)
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lanes[l].used = false;
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}
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int lane = -1;
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for (int l = 0; l < NUM_LANES; l++)
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{
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if (lanes[l].used == false)
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{
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lane = l;
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break;
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}
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}
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if (lane == -1)
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{
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// error
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continue;
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}
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lanes[lane].end = lines[i].second;
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lanes[lane].used = true;
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lines[i].laneIndex = lane;
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}
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}
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void DisassemblyFunction::load()
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{
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generateBranchLines();
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// gather all branch targets
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std::set<u32> branchTargets;
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for (size_t i = 0; i < lines.size(); i++)
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{
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switch (lines[i].type)
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{
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case LINE_DOWN:
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branchTargets.insert(lines[i].second);
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break;
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case LINE_UP:
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branchTargets.insert(lines[i].first);
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break;
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}
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}
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DebugInterface* cpu = DisassemblyManager::getCpu();
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u32 funcPos = address;
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u32 funcEnd = address+size;
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while (funcPos < funcEnd)
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{
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MIPSAnalyst::MipsOpcodeInfo opInfo = MIPSAnalyst::GetOpcodeInfo(cpu,funcPos);
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u32 opAddress = funcPos;
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funcPos += 4;
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// skip branches and their delay slots
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if (opInfo.isBranch)
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{
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DisassemblyOpcode* opcode = new DisassemblyOpcode(opAddress,2);
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entries[opAddress] = opcode;
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lineAddresses.push_back(opAddress);
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lineAddresses.push_back(opAddress+4);
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funcPos += 4;
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continue;
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}
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// lui
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if (MIPS_GET_OP(opInfo.encodedOpcode) == 0x0F && funcPos < funcEnd)
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{
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MIPSOpcode next = Memory::Read_Instruction(funcPos);
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MIPSInfo nextInfo = MIPSGetInfo(next);
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u32 immediate = ((opInfo.encodedOpcode & 0xFFFF) << 16) + (s16)(next.encoding & 0xFFFF);
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int rt = MIPS_GET_RT(opInfo.encodedOpcode);
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int nextRs = MIPS_GET_RS(next.encoding);
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int nextRt = MIPS_GET_RT(next.encoding);
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// both rs and rt of the second op have to match rt of the first,
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// otherwise there may be hidden consequences if the macro is displayed.
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// also, don't create a macro if something branches into the middle of it
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if (nextRs == rt && nextRt == rt && branchTargets.find(funcPos) == branchTargets.end())
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{
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DisassemblyMacro* macro = NULL;
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switch (MIPS_GET_OP(next.encoding))
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{
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case 0x09: // addiu
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macro = new DisassemblyMacro(opAddress);
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macro->setMacroLi(immediate,rt);
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funcPos += 4;
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break;
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case 0x20: // lb
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case 0x21: // lh
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case 0x23: // lw
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case 0x24: // lbu
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case 0x25: // lhu
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case 0x28: // sb
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case 0x29: // sh
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case 0x2B: // sw
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macro = new DisassemblyMacro(opAddress);
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int dataSize;
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switch (nextInfo & MEMTYPE_MASK) {
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case MEMTYPE_BYTE:
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dataSize = 1;
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break;
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case MEMTYPE_HWORD:
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dataSize = 2;
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break;
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case MEMTYPE_WORD:
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case MEMTYPE_FLOAT:
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dataSize = 4;
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break;
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case MEMTYPE_VQUAD:
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dataSize = 16;
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break;
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}
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macro->setMacroMemory(MIPSGetName(next),immediate,rt,dataSize);
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funcPos += 4;
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break;
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}
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if (macro != NULL)
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{
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entries[opAddress] = macro;
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for (int i = 0; i < macro->getNumLines(); i++)
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{
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lineAddresses.push_back(macro->getLineAddress(i));
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}
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continue;
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}
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}
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}
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// just a normal opcode
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DisassemblyOpcode* opcode = new DisassemblyOpcode(opAddress,1);
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entries[opAddress] = opcode;
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lineAddresses.push_back(opAddress);
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}
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}
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void DisassemblyFunction::clear()
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{
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for (auto it = entries.begin(); it != entries.end(); it++)
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{
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delete it->second;
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}
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entries.clear();
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lines.clear();
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lineAddresses.clear();
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hash = 0;
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}
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bool DisassemblyOpcode::disassemble(u32 address, DisassemblyLineInfo& dest, bool insertSymbols)
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{
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char opcode[64],arguments[256];
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const char *dizz = DisassemblyManager::getCpu()->disasm(address,4);
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parseDisasm(dizz,opcode,arguments,insertSymbols);
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dest.name = opcode;
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dest.params = arguments;
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dest.totalSize = 4;
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return true;
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}
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void DisassemblyMacro::setMacroLi(u32 _immediate, u8 _rt)
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{
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type = MACRO_LI;
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name = "li";
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immediate = _immediate;
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rt = _rt;
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numOpcodes = 2;
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}
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void DisassemblyMacro::setMacroMemory(std::string _name, u32 _immediate, u8 _rt, int _dataSize)
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{
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type = MACRO_MEMORYIMM;
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name = _name;
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immediate = _immediate;
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rt = _rt;
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dataSize = _dataSize;
|
|
numOpcodes = 2;
|
|
}
|
|
|
|
bool DisassemblyMacro::disassemble(u32 address, DisassemblyLineInfo& dest, bool insertSymbols)
|
|
{
|
|
char buffer[64];
|
|
|
|
const char* addressSymbol;
|
|
switch (type)
|
|
{
|
|
case MACRO_LI:
|
|
dest.name = name;
|
|
|
|
addressSymbol = DisassemblyManager::getCpu()->findSymbolForAddress(immediate);
|
|
if (addressSymbol != NULL && insertSymbols)
|
|
{
|
|
sprintf(buffer,"%s,%s",DisassemblyManager::getCpu()->GetRegName(0,rt),addressSymbol);
|
|
} else {
|
|
sprintf(buffer,"%s,0x%08X",DisassemblyManager::getCpu()->GetRegName(0,rt),immediate);
|
|
}
|
|
|
|
dest.params = buffer;
|
|
|
|
dest.info.hasRelevantAddress = true;
|
|
dest.info.releventAddress = immediate;
|
|
break;
|
|
case MACRO_MEMORYIMM:
|
|
dest.name = name;
|
|
|
|
addressSymbol = DisassemblyManager::getCpu()->findSymbolForAddress(immediate);
|
|
if (addressSymbol != NULL && insertSymbols)
|
|
{
|
|
sprintf(buffer,"%s,%s",DisassemblyManager::getCpu()->GetRegName(0,rt),addressSymbol);
|
|
} else {
|
|
sprintf(buffer,"%s,0x%08X",DisassemblyManager::getCpu()->GetRegName(0,rt),immediate);
|
|
}
|
|
|
|
dest.params = buffer;
|
|
|
|
dest.info.isDataAccess = true;
|
|
dest.info.dataAddress = immediate;
|
|
dest.info.dataSize = dataSize;
|
|
|
|
dest.info.hasRelevantAddress = true;
|
|
dest.info.releventAddress = immediate;
|
|
break;
|
|
default:
|
|
return false;
|
|
}
|
|
|
|
dest.totalSize = getTotalSize();
|
|
return true;
|
|
}
|