8 commits

Author	SHA1	Message	Date
Unknown W. Brackets	cd46f0b4cb	irjit: Cache IR metadata lookups. ... This improves compilation performance, because all those lookups were adding up.	2023-09-30 15:56:53 -07:00
Unknown W. Brackets	6507251e83	irjit: Consider temps clobbered by block end.	2023-08-27 12:26:42 -07:00
Unknown W. Brackets	f263698897	irjit: Cleanup temp purging on exit. ... We were sometimes considering it read by exit and not purging.	2023-08-27 12:26:05 -07:00
Unknown W. Brackets	81e24a9fee	irjit: Fix regalloc clobber on exit.	2023-08-20 22:12:52 -07:00
Unknown W. Brackets	552cd88938	irjit: Skip some work in PurgeTemps.	2023-08-20 08:59:47 -07:00
Unknown W. Brackets	fa53b80574	irjit: Cleanup/purge FPU/VFPU temps. ... A lot of cases are followed by an FMov that just moved the temp to a regular register, from VFPU instructions playing safe about overlaps.	2023-08-13 10:14:10 -07:00
Nemoumbra	c2f9ae2e16	Buildfix for VS2017	2023-08-06 15:06:54 +03:00
Unknown W. Brackets	f870271011	riscv: Spill registers more intelligently.	2023-07-30 14:24:12 -07:00