Commit graph

1922 commits

Author SHA1 Message Date
Henrik Rydgård
c55847a79e Fix typo causing #10408 2017-12-14 00:23:07 +01:00
Henrik Rydgård
0207739d76 Can't call functions through known-nil pointers, even if they don't touch local data - LLVM's optimizer might have done something stupid. 2017-11-30 01:07:03 +01:00
Henrik Rydgård
bb9181b949 Fix the prefix problems on ARM 32-bit as well. 2017-11-24 17:05:10 +01:00
Henrik Rydgård
87942dd741 ARM64 JIT: Fix additional VFPU prefix problems 2017-11-24 14:05:19 +01:00
Henrik Rydgård
2cceba41bc Fix JIT bug in ARM64. Fixes #10183 2017-11-24 13:57:27 +01:00
Henrik Rydgård
bd8067a631 Reduce a ERROR_LOG_REPORT to a warning (vfpu branches in delay slots) 2017-11-11 19:39:44 +01:00
Henrik Rydgård
8fe171253d Disable lwl/lwr on ARM64 JIT again. Seems b9b2656e93 broke things, see #10020 2017-11-08 12:11:55 +01:00
twinaphex
4855b2d6f1 mingw patches 2017-08-31 22:15:05 +02:00
Henrik Rydgård
22e65ba80d Get rid of ugly alignment macros and some other cruft, we now have alignas(16) from C++11 2017-08-31 01:14:51 +02:00
Henrik Rydgård
884aef6603 SafeMem: Remove the "far" optimization that saves 3 bytes sometimes but is really dangerous and not worth the complexity. 2017-08-30 09:58:30 +02:00
Henrik Rydgård
8d0498303a Fix a PIC compliance bug in the VFPU. Comment other cases properly (for easy searching). 2017-08-29 11:45:12 +02:00
Henrik Rydgård
641c5f36f9 Merge pull request #9915 from unknownbrackets/marvel-copy
Add hooks for Marvel video copy func
2017-08-19 21:30:43 +02:00
Unknown W. Brackets
1cf5e30bd6 Add hooks for Marvel video copy func.
Not tested - but should make videos visible in Marvel Ultimate Alliance 1.

See #9852.
2017-08-19 11:47:42 -07:00
Henrik Rydgård
b9b2656e93 More vulkan microoptimizations. Add more profiler scopes. 2017-08-18 13:48:11 +02:00
Henrik Rydgård
ed776d8c0b ARM: Delete obsolete comments and check 2017-08-18 13:48:11 +02:00
Unknown W. Brackets
3dacd323c8 x64: Avoid clobbering jr dest in cases. 2017-07-08 16:40:06 -07:00
Unknown W. Brackets
79a6690a30 x64: Fix coreState rip checks. 2017-07-08 16:39:26 -07:00
Henrik Rydgård
8d86463b1a More RIP fixes 2017-07-07 15:46:14 +02:00
Henrik Rydgård
837118d230 More RIP elimination 2017-07-07 15:07:56 +02:00
Henrik Rydgård
86396ba39b Turning off the "close memory finder" lets us find more RIP addressing... 2017-07-07 15:07:53 +02:00
Henrik Rydgard
8872057a2d x86-64: Linux ABI fix 2017-07-07 14:22:35 +02:00
Henrik Rydgård
dad5ca45f2 Delete some unnecessary loads. These loads are done properly inside trigCallHelper. 2017-07-07 14:15:10 +02:00
Henrik Rydgård
d312086a61 32-bit fixes 2017-07-07 13:57:37 +02:00
Henrik Rydgård
e5a7d0df95 Buildfix for platforms with standards-compliant offsetof (no dynamic indexing allowed)k 2017-07-07 12:59:23 +02:00
Henrik Rydgård
087c118003 Workaround 2017-07-07 12:48:17 +02:00
Henrik Rydgård
ecbeee5225 RegCacheFPU 2017-07-07 11:33:07 +02:00
Henrik Rydgård
758cbd748e Replace vminmax_sreg with mips->temp 2017-07-07 11:33:07 +02:00
Henrik Rydgård
270001e651 vminmax_sreg only needs a single element 2017-07-07 11:33:07 +02:00
Henrik Rydgård
567937fa4d x64: Enable non-RIP addressing for FPU registers 2017-07-07 11:33:07 +02:00
Henrik Rydgård
077fafba64 Get rid of sincostemp global. Solution not tested on linux yet. 2017-07-07 11:33:06 +02:00
Henrik Rydgård
cfa7c61651 More RIP removal. Also add some comments to make it easy to just search for "M(&" to find remaining offenders. 2017-07-07 11:33:06 +02:00
Henrik Rydgård
0645677fea Access FPU temps through CTXREG 2017-07-07 11:33:06 +02:00
Henrik Rydgård
752254d404 Surprise! More. Making many commits for easier bisects. 2017-07-07 11:33:06 +02:00
Henrik Rydgård
0743334946 Guess what? More RIP elimination (but keep the fast path too) 2017-07-07 11:33:05 +02:00
Henrik Rydgård
7c3b37c561 More RIP elimination 2017-07-07 11:33:05 +02:00
Henrik Rydgård
7c1ae5b3e6 Move tempValues into MIPSState 2017-07-07 11:33:05 +02:00
Henrik Rydgård
f08c278fd5 Move another couple of temps into MIPSState 2017-07-07 11:33:05 +02:00
Henrik Rydgård
102be8654f Remove RIP access from some matrix ops, SafeMem 2017-07-07 11:33:05 +02:00
Henrik Rydgård
2e9a9f2d7c Move mscxr_temp to MIPSState 2017-07-07 11:33:05 +02:00
Henrik Rydgård
d82f90f1b2 More RIP removal 2017-07-07 11:33:05 +02:00
Henrik Rydgård
78538ff61e Some code cleanup. More work towards removing RIP addressing 2017-07-07 11:33:04 +02:00
Henrik Rydgård
80b82ecd81 Buildfix attempt 2017-07-07 11:33:02 +02:00
Henrik Rydgård
f44f7472e5 Remove more RIP addressing 2017-07-05 13:27:38 +02:00
Henrik Rydgård
99d23fb021 X64/X86: Even more use of the context register 2017-07-05 13:21:35 +02:00
Henrik Rydgård
730e9ced6c X86/X64: We have the context register loaded, let's use it more. 2017-07-05 13:12:42 +02:00
Henrik Rydgård
c4db0a2311 x64: Use context register to access saved_flags 2017-07-05 12:45:56 +02:00
Unknown W. Brackets
33b073c545 Jit: Fix syscall outside delay slot.
Doesn't happen in real games, but useful in debug code.
2017-06-04 10:39:01 -07:00
LunaMoo
5e0f8141d2 Corrections, some %i->%d around other code as well. 2017-05-30 13:52:29 +02:00
Henrik Rydgård
0ec1e5e3b2 Don't erase and rewrite the dispatcher when the cache is cleared. Fixes #9708 2017-05-26 15:48:03 +02:00
Unknown W. Brackets
6b3944d329 UnitTest: Correct vertex and jit tests.
We now convert texcoords to floats.
2017-05-06 18:45:04 -07:00