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28 commits

Author SHA1 Message Date
Henrik Rydgård
b43698a13d Remove most instances of base/logging.h from Common, Core, GPU, more 2020-08-15 19:08:44 +02:00
Unknown W. Brackets
b8342fb8ec SaveState: Rename ChunkFile files to Serialize. 
Makes more sense and less weird than ChunkFileDoMap, etc.
 2020-08-10 08:04:05 +00:00
Unknown W. Brackets
4b4e3432cd SaveState: Split Do() into a separate header. 2020-08-10 08:03:41 +00:00
Unknown W. Brackets
ab809bd19e jit: Apply hasSetRounding at compile time. 
Otherwise, the block will be executed with the wrong rounding mode the
first time rounding is set.  This could be important if it was set for a
single operation.

This is only a problem the first time it's set.
 2018-04-01 10:36:16 -07:00
Henrik Rydgård
4a32ec3102
Merge pull request #10516 from unknownbrackets/irjit-lwr 
irjit: Optimize out more temps and lwl/lwr operations
 2018-01-10 09:11:10 +01:00
Unknown W. Brackets
b11f00cead irjit: Combine lwl/lwr and swl/swr, like before. 
Still want to inline the operation, because the backend shouldn't have to
redo it every time, and we want the temps cleaned up if possible.
 2018-01-07 21:05:58 -08:00
Unknown W. Brackets
97674b80bd irjit: Skip preloading blocks with jump to 0. 
These will be changed before executing anyway.
 2018-01-06 17:23:53 -08:00
Unknown W. Brackets
bc541bd020 irjit: Encode downcount directly as a constant. 
Simpler this way, now.
 2018-01-03 23:32:31 -08:00
Unknown W. Brackets
cffb2d61a7 irjit: Embed constant inside IRInst. 
This simplifies a bunch of code and improves compile performance by about
30%, at the cost of a bit more memory.
 2018-01-03 23:24:04 -08:00
Unknown W. Brackets
b11858d9a0 irjit: Properly account for delay slots in size. 
Otherwise we think blocks are 4 bytes too short, which can affect
invalidation.
 2018-01-01 22:54:40 -08:00
Unknown W. Brackets
b37ba9e599 irjit: Add options for compile/optimize steps. 
This way the backend can set flags for the type of IR it wants.  It's
seems too complex to combine certain things like lwl/lwr in a pass.
 2018-01-01 08:38:12 -08:00
Unknown W. Brackets
905d2c2da6 irjit: Cleanup some invalid op handling. 
And log blocks the same way as other backends.
 2018-01-01 08:38:11 -08:00
Unknown W. Brackets
8ffb0101fe jit: Report blocks with uneaten VFPU prefixes. 
There may be options to avoid, like continuing these blocks, especially if
they're likely or something.
 2018-01-01 08:38:10 -08:00
Unknown W. Brackets
4578c3cb54 jit-ir: Implement memory breakpoints. 
These generally work, but likely delay slots will make downcount slightly
off, and won't resume when you hit run again without manually stepping
through them.
 2016-07-02 16:38:30 -07:00
Unknown W. Brackets
1df08518ae jit-ir: Implement basic icache clear. 2016-07-01 17:27:24 -07:00
Unknown W. Brackets
6fb34d0bee jit-ir: Add initial breakpoint support. 
No memory breakpoints yet, and cache isn't cleared yet so these don't work
exactly the way you might expect...
 2016-07-01 17:15:57 -07:00
Unknown W. Brackets
5534fba72c jit-ir: Add load/store reorder and merge passes. 
Can do more in merge, potentially.  Maybe it's not useful...
 2016-05-17 21:24:13 -07:00
Henrik Rydgard
fff898b526 Log the block when "uneaten prefix" happens 2016-05-16 00:05:03 +02:00
Unknown W. Brackets
efc8a8e353 Hack to make Symbian build. 2016-05-13 23:56:17 -07:00
Henrik Rydgard
91a6cf5e44 Add a couple more passes (2-op, optimize f<->v fp moves) 2016-05-13 20:14:03 +02:00
Henrik Rydgard
f636b2a315 Minor build and other fixes 2016-05-13 19:31:27 +02:00
Unknown W. Brackets
29ed8d2201 jit-ir: ExitToReg doesn't write to registers. 2016-05-12 18:34:27 -07:00
Unknown W. Brackets
99468c6fc1 jit-ir: Optimize out unused temp regs. 
This way, if constants have made the temp obsolete (common with ins, for
example), it won't even get set anymore.
 2016-05-12 18:30:53 -07:00
Henrik Rydgard
850d0abc91 IR: More VFPU. Support normal fp compares. 2016-05-12 20:16:15 +02:00
Henrik Rydgard
558bb197c7 More VFPU 2016-05-09 23:47:56 +02:00
Henrik Rydgard
a5d5c5ce2b Do the voffset remapping before the IR. This will let us easily add some virtual VFPU registers for the IR to the end, plus it's slightly faster. 2016-05-09 22:40:59 +02:00
Henrik Rydgard
28087a6088 IRFrontend shouldn't know about IRBlock 2016-05-09 20:18:22 +02:00
Henrik Rydgard
e711a47a75 Complete the separation of the IR compiler frontend from the "Jit" 2016-05-09 20:05:06 +02:00