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41 commits

Author SHA1 Message Date
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6ccae8f5a7 x86jit: Use a faster safemem fallback. 
Really helps performance in games that use uncached addresses a lot,
without really impacting performance of most games which don't.

Of course, fastmem is faster.
 2014-05-06 08:05:12 -07:00
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2347498667 x86jit: Use templates to avoid some void * casts. 
Makes it a bit cleaner and potentially safer.
 2014-01-18 09:57:13 -08:00
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455a7e090d Compile the cache instruction to nothing. 
Was showing up in a few profiles, does nothing currently.
 2013-11-10 14:38:10 -08:00
Henrik Rydgard
5ad04a23f4 x86 jit: Rename BindToRegister to MapReg 2013-11-09 15:23:31 +01:00
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97aa1a631e Improve typesafety in the x86 regalloc. 2013-08-24 19:41:10 -07:00
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109ad17ac6 Use a typesafe struct for opcodes. 
Also, correctly read delayslots using Read_Instruction on ARM.
 2013-08-24 15:36:24 -07:00
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286c153c6a Fix memchecks for halfwords and bytes. 
Before it was doing the range on a 4 byte read, which would trip a
memcheck that wasn't actually being hit if the byte of halfword was
unaligned.
 2013-07-06 13:15:48 -07:00
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2d15eb2acd Re-enable lwl/lwr/swl/swr on the x86 jit. 
Now correctly handling ECX on x64.
 2013-07-06 01:21:52 -07:00
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1c9086617a DISABLE the swr/swl and friends for now. 
Broke Disgaea on x64 only, not sure why right now.
 2013-07-05 02:53:15 -07:00
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e27ab6fa11 Add swl/swr to the x86 jit. 2013-07-04 17:34:56 -07:00
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203daf955b Implement lwl/lwr in the x86 jit. 2013-07-04 17:30:36 -07:00
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2d6a730cac Add some basics for memory checks to x86 jit. 
Specifically, we will need to be able to bail in delayslots,
and we will need to know the size of the access (useful anyway.)
 2013-03-09 02:41:46 -08:00
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f6f2927526 Add curlies around DISABLE/CONDITIONAL_DISABLE. 2013-02-15 08:35:33 -08:00
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f777c872e6 Jit unaligned reads/writes. 
This mostly just improves perf on debug, not really on the map for release.
 2013-02-02 13:12:34 -08:00
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b77ce99d01 Oops, no slow read for immediates usually. 2013-01-26 09:27:52 -08:00
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9cd5836b85 Rename WriteFinish() to Finish() is safe mem. 
It's nothing to do with writing.
 2013-01-26 09:09:47 -08:00
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3e419f513a Refactor jit safe memory reads without dup code. 
But, maybe too automagical...
 2013-01-26 08:42:34 -08:00
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b7ef3e7bef Make sure to log / check bad immediate mem access. 
Although, theoretically, this should never happen.
Also, definitely time to refactor.
 2013-01-25 23:06:43 -08:00
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3418383917 Immediately break on bad mem access in jit slowmem. 2013-01-25 22:52:51 -08:00
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f5963df0dc Optimize write to a single x64 op too. 2013-01-20 13:06:19 -08:00
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e8dc99328a Avoid using EAX as a temporary where possible. 
All the regs should be indirect addressing compatible.  So if it's
in a reg, let's use that instead of EAX.
 2013-01-20 12:57:14 -08:00
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eaa24ee047 Use EDX as a temporary for sb, and jit it. 2013-01-20 12:25:08 -08:00
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30f6a4ba87 Fix stupid stupid typo breaking slowmem jit. 2013-01-20 09:39:13 -08:00
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53600161ba Don't write anything to a bad static pointer. 
Not sure what came over me...
 2013-01-20 00:19:18 -08:00
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e78223d2c0 Since flipping the op is easy, also do lb/lh. 2013-01-19 16:25:57 -08:00
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5e8f1917ee Fix 64-bit memory dereferencing. 2013-01-19 16:25:57 -08:00
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90e6f0b7df Optimize static memory read/writes in jit as well. 
Like the arm jit does.
 2013-01-19 16:25:56 -08:00
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c64966c16e Oops, lost the CONDITIONAL_DISABLE. 2013-01-19 16:25:56 -08:00
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37fb64ac83 Fast path scratchpad too, shouldn't be expensive. 2013-01-19 11:11:45 -08:00
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72e547420d Refactor jit slowmem, add lbu to jit since easy. 2013-01-19 11:11:45 -08:00
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5305017fc3 Properly save registers before the slowmem call. 2013-01-19 11:11:44 -08:00
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f1295f6262 Don't muck with currentMIPS->r in the slowmem jit. 2013-01-19 11:11:44 -08:00
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2ad77aa9c8 Gotta flush before the call, too. 2013-01-19 01:53:11 -08:00
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09422d5adb Avoid a func if possible when fastmem is off. 2013-01-19 01:02:47 -08:00
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bc75b68c36 Also jit sh and lhu, which are pretty common ops. 2013-01-18 23:10:51 -08:00
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d5ae85201c Optimize sw/lw even under safe memory. 
They're very common instructions, so shaving cycles helps.
 2013-01-18 23:10:50 -08:00
Arthur Blot
be91ad2f9c Fixed $zr being non-zero after loading instruction 2013-01-03 16:14:45 +01:00
Henrik Rydgard
f5efd6f2b1 JIT: add option to enable/disable jit of memory instructions. for crash safety. 2012-12-21 16:50:13 +01:00
Henrik Rydgard
d485b76e11 Jit fixes, test update 2012-11-12 14:35:10 +01:00
Henrik Rydgard
64cc573703 Switch to "GPL 2.0 or later" for various reasons. I wrote most of the code I imported from Dolphin (which is GPL2-but-not-later), so it should be OK. 2012-11-04 23:24:00 +01:00
Henrik Rydgard
4f7ad15758 Add snapshot of the whole source code. 2012-11-01 16:19:01 +01:00