31 commits

Author	SHA1	Message	Date
Unknown W. Brackets	f1a9e39ce9	x86jit: Fix IR vcmp all bit.	2023-10-03 17:46:29 -07:00
Henrik Rydgård	51456980db	Merge pull request #18121 from unknownbrackets/jit-ir-profiler ... IR: Add mini native jit MIPS block profiler	2023-09-25 09:04:55 +02:00
Unknown W. Brackets	9b2fa46861	IR: Add mini native jit MIPS block profiler.	2023-09-24 23:04:29 -07:00
Unknown W. Brackets	05786f5719	x86jit: Correct spill on IR lane extract.	2023-09-24 19:06:06 -07:00
Henrik Rydgård	1c58617392	Merge pull request #18208 from unknownbrackets/x86-ir-float ... x86jit: Speed up float to int conversions	2023-09-24 09:30:00 +02:00
Henrik Rydgård	ac3139b8ee	Merge pull request #18213 from unknownbrackets/x86-ir-fcmp ... IR: Improve fcmp/vfpu compare jit	2023-09-24 09:29:14 +02:00
Unknown W. Brackets	6d41f15f0d	x86jit: Implement FSign.	2023-09-23 22:08:17 -07:00
Unknown W. Brackets	24da5a3ba2	irjit: Small simplification to regcache.	2023-09-23 22:00:49 -07:00
Unknown W. Brackets	14e2e1ed62	x64jit: Optimize FCmpVfpuAggregate.	2023-09-23 14:31:46 -07:00
Unknown W. Brackets	c5d896a9d7	x86jit: Speed up c.eq.s.	2023-09-23 14:31:18 -07:00
Unknown W. Brackets	1c81d47dd4	x86jit: Speed up float to int conversions.	2023-09-23 13:28:58 -07:00
Unknown W. Brackets	97d9a7f07f	arm64jit: Implement FCmp.	2023-09-06 00:09:26 -07:00
Henrik Rydgård	f6c1493373	Merge pull request #18048 from unknownbrackets/irjit-vec4 ... IR: Add a pass to keep things in vec4 more	2023-09-02 15:11:06 +02:00
Unknown W. Brackets	becad54923	x86jit: Maintain Vec4 on FMov extract.	2023-09-01 22:35:59 -07:00
Unknown W. Brackets	c5d0e1d0cc	x86jit: Implement float to integer.	2023-09-01 22:31:25 -07:00
Unknown W. Brackets	bcac804cc5	x86jit: Fix vsat0 saturate.	2023-08-30 23:07:57 -07:00
Unknown W. Brackets	181adde6f1	x86jit: Implement float saturates.	2023-08-28 23:11:46 -07:00
Unknown W. Brackets	c4d13e522b	x86jit: Use a literal pool to avoid rip checks.	2023-08-28 23:11:46 -07:00
Unknown W. Brackets	eab05e32a7	x86jit: Implement FCvtScaledSW.	2023-08-28 23:11:46 -07:00
Unknown W. Brackets	2b6bd01417	x86jit: Optimize FMul.	2023-08-28 23:11:46 -07:00
Unknown W. Brackets	61a99b4bac	x86jit: Implement trig/reciprocals.	2023-08-27 23:24:30 -07:00
Unknown W. Brackets	4b1c809886	x86jit: Implement a few more float ops, shuffle.	2023-08-27 23:24:30 -07:00
Unknown W. Brackets	be4fe52796	x86jit: A few more float ops.	2023-08-25 00:01:03 -07:00
Unknown W. Brackets	bfb8df8472	x86jit: Implement fneg/abs.	2023-08-25 00:01:02 -07:00
Unknown W. Brackets	2fbdc42a5c	x86jit: Reduce code a bit in SETcc paths.	2023-08-25 00:00:35 -07:00
Unknown W. Brackets	e2c6011906	x86jit: Implement VFPU Fcmp.	2023-08-23 22:17:55 -07:00
Unknown W. Brackets	ef93b7547e	x86jit: Add vmin/vmax.	2023-08-23 22:17:55 -07:00
Unknown W. Brackets	931c84f835	x86jit: Implement FCmp.	2023-08-23 22:17:55 -07:00
Unknown W. Brackets	11c40e6889	x86: Implement a few basic float/vec4 ops.	2023-08-22 10:39:46 +02:00
Unknown W. Brackets	521b63dd2b	x86jit: Implement FMul.	2023-08-22 10:39:46 +02:00
Unknown W. Brackets	4e3f3860f9	x86jit: Stub out op categories to files.	2023-08-20 22:28:54 -07:00