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44 commits

Author SHA1 Message Date
Henrik Rydgård
dd4c8617e2 Eliminate a PVS-studio false positive warning 2025-02-04 10:19:34 -06:00
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f54f5581cd
interp: Potential linker buildfix. 
Just in case it's thinking there's a definition to link, should use static.
 2023-06-04 19:23:16 -07:00
Henrik Rydgård
1ef1478cc8 Remove more impossibilities (GetMtxSize) 2023-06-04 11:48:43 +02:00
Henrik Rydgård
a92cca2575 Don't check for impossibilities. Minor speedup for GetVecSize. 2023-06-04 11:28:39 +02:00
Henrik Rydgård
9db9fec898 VFPU: Some micro-optimizations. Don't fall back to interpreter path for vexp/vlog/vrexp. 2023-06-04 11:28:33 +02:00
fp64
71884d5843 Make vrnd match HW closer 
See investigation starting
https://github.com/hrydgard/ppsspp/issues/16946#issuecomment-1467261209
for more details.
Still needs more testing.
 2023-05-25 14:18:19 -04:00
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6da10463f9 Debugger: Make reg names safer, stop using v000. 
Better to use S000, etc. as that's more clear throughout.
 2023-04-29 09:48:33 -07:00
Henrik Rydgård
aba026f7e9 Add back our older VFPU approximations, as fallbacks if files are missing. 
PR #16984 added more accurate versions of these functions, but they require
large lookup tables stored in assets/.

If these files are missing, PPSSPP would simply crash, which isn't good.

We should probably try to warn the user somehow that these files are
missing, though...
 2023-04-03 11:33:41 +02:00
fp64
38fc21a2c0 Implement load-on-demand of vfpu tables 2023-03-12 08:21:15 -04:00
fp64
67bb17eba3 Add more vfpu_*, move tables to assets 2023-03-12 08:21:15 -04:00
fp64
3661bb27ce Implement sin/cos as per #16946 2023-03-12 08:21:13 -04:00
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a7b7bf7826 Global: Set many read-only params as const. 
This makes what they do and which args to use clearer, if nothing else.
 2022-12-10 21:13:36 -08:00
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3df6cb704f Global: Fix some type conversion warnings. 
Hidden by some warning disables.
 2022-01-30 16:09:33 -08:00
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07cb37c2c1 Compat: Remove single/double sincos path. 
New implementation should work for both cases.
 2021-04-25 07:09:50 -07:00
Henrik Rydgård
9e4c7c84ac Only use double precision sincos in Hitman Reborn Battle Arena 2. See #12900 2020-11-23 23:51:07 +01:00
Henrik Rydgård
3db4c0bc5e Partially revert "VFPU: Compute sines and cosines in double precision." 
This reverts commit 16654d37ea.
 2020-11-23 23:34:33 +01:00
Henrik Rydgård
16654d37ea VFPU: Compute sines and cosines in double precision. 
Let's see if we can do without the special checks in double precision.
 2020-10-10 17:45:42 +02:00
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c1c869df27 interp: Implement software inverse square root. 2019-08-04 21:24:13 -07:00
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13278dc1f4 interp: Implement software sqrt to match PSP. 
This matches the PSP's square root better.

Disabled by default using a compile-time flag.
 2019-08-04 21:23:04 -07:00
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4bff980d34 interp: Use software dot for better accuracy. 
This gets some vdot/similar tests to give more accurate results compared
to hardware.  Also added flushing of zero and NaNs.

Currently disabled, only enabled with a compile-time flag.
 2019-08-04 21:14:23 -07:00
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732d344328 Common: Fix some unused ident and case warnings. 2019-06-22 13:22:12 -07:00
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5736b1be2a interp: Correct some negative invalid zero cases. 
In these cases, the input value wires to +0.  Also, transposed the values
in a comment (oops.)
 2019-03-31 13:45:37 -07:00
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af3ed69144 interp: Mask moves to vfpu ctrl. 
These bits of the registers can't be written.
 2019-03-31 10:37:07 -07:00
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26b1368f7b interp: Handle vrot prefixes mostly correctly. 
Still some issues with 1/2 results and negate on swizzle.
 2019-03-31 10:37:07 -07:00
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8fd8dce185 interp: Use a helper to generate prefix consts. 
This makes more logical sense that using the VFPU_SWIZZLE and VFPU_ABS
macros to select the constant, although that's how the bits work.
 2019-03-31 10:33:26 -07:00
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0be3213151 interp: Correct vscl prefix handling. 2019-03-31 10:13:28 -07:00
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fef8e71b8f interp: Correct behavior for matrixes with size=1. 
Games don't (shouldn't?) actually use 1x1 matrices, but they seem to have
predictable behavior in matrix ops.
 2019-03-31 08:21:29 -07:00
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22940f0393 Debugger: Avoid asserts in disassembly. 2018-06-08 06:59:18 -07:00
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5b7bd8155d Special case specific sin/cos result values. 
Fixes #7737, thanks go to gid15 from Jpcsp for finding and daniel229 for
reporting.
 2016-05-29 08:51:38 -07:00
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3f0fc2d851 jit-ir: Fix FSat0_1 behavior on -0.0f. 2016-05-15 13:10:49 -07:00
Henrik Rydgard
45efcda6b1 IR: Some more VFPU 2016-05-10 21:50:08 +02:00
Henrik Rydgard
37413f8119 We can use sincosf again on Android - the bug in the NDK has been fixed. 2014-12-07 11:53:46 +01:00
Henrik Rydgard
8f016d3e48 Merge some matrix utils and stuff from the NEON branch 2014-11-29 11:37:45 +01:00
Henrik Rydgard
ee1d16cb1d Use sincosf where available (linux) 2014-06-15 12:06:02 +02:00
Henrik Rydgard
e6f55bfef0 Fix silly mistake in vfpu_sincos. Add unittest. 2014-06-15 11:51:30 +02:00
Henrik Rydgard
0879d76503 VFPU: Ensure that sin(4*x) returns 0.0 (and cos 1) for all x. Fixes #2921 2014-06-15 11:03:00 +02:00
lioncash
b9886942a7 Fix some vertical alignments in misc Core source files. 2014-03-03 11:16:53 -05:00
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ec05146ffd Improve vfpu disasm for a few instructions. 2013-11-29 10:07:15 -08:00
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109ad17ac6 Use a typesafe struct for opcodes. 
Also, correctly read delayslots using Read_Instruction on ARM.
 2013-08-24 15:36:24 -07:00
Henrik Rydgard
59644ad59b Jit: Implement VMMUL for ARM, optimize the x86 implementation. Also add VCST. 2013-07-28 12:14:35 +02:00
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b733bc1a2a Clean up some indents, add some reporting. 2013-05-18 02:09:32 -07:00
Henrik Rydgard
aabc0aa9ef Quick implementation of LV.Q and SV.Q in x86/x64 JIT 2013-01-25 19:50:30 +01:00
Henrik Rydgard
64cc573703 Switch to "GPL 2.0 or later" for various reasons. I wrote most of the code I imported from Dolphin (which is GPL2-but-not-later), so it should be OK. 2012-11-04 23:24:00 +01:00
Henrik Rydgard
4f7ad15758 Add snapshot of the whole source code. 2012-11-01 16:19:01 +01:00