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IR: Disable unworkable overwriting of instructions on invalidation. Add debug-mode sanity check.
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parent
a27935d5ac
commit
eda60a5df9
2 changed files with 26 additions and 2 deletions
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@ -110,6 +110,8 @@ void IRJit::InvalidateCacheAt(u32 em_address, int length) {
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}
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}
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void IRJit::Compile(u32 em_address) {
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void IRJit::Compile(u32 em_address) {
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_dbg_assert_(compilerEnabled_);
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PROFILE_THIS_SCOPE("jitc");
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PROFILE_THIS_SCOPE("jitc");
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if (g_Config.bPreloadFunctions) {
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if (g_Config.bPreloadFunctions) {
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@ -146,6 +148,8 @@ void IRJit::Compile(u32 em_address) {
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// WARNING! This can be called from IRInterpret / the JIT, through the function preload stuff!
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// WARNING! This can be called from IRInterpret / the JIT, through the function preload stuff!
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bool IRJit::CompileBlock(u32 em_address, std::vector<IRInst> &instructions, u32 &mipsBytes, bool preload) {
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bool IRJit::CompileBlock(u32 em_address, std::vector<IRInst> &instructions, u32 &mipsBytes, bool preload) {
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_dbg_assert_(compilerEnabled_);
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frontend_.DoJit(em_address, instructions, mipsBytes, preload);
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frontend_.DoJit(em_address, instructions, mipsBytes, preload);
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if (instructions.empty()) {
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if (instructions.empty()) {
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_dbg_assert_(preload);
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_dbg_assert_(preload);
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@ -176,6 +180,8 @@ bool IRJit::CompileBlock(u32 em_address, std::vector<IRInst> &instructions, u32
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}
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}
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void IRJit::CompileFunction(u32 start_address, u32 length) {
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void IRJit::CompileFunction(u32 start_address, u32 length) {
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_dbg_assert_(compilerEnabled_);
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PROFILE_THIS_SCOPE("jitc");
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PROFILE_THIS_SCOPE("jitc");
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// Note: we don't actually write emuhacks yet, so we can validate hashes.
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// Note: we don't actually write emuhacks yet, so we can validate hashes.
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@ -264,7 +270,9 @@ void IRJit::RunLoopUntil(u64 globalticks) {
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}
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}
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MIPSState *mips = mips_;
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MIPSState *mips = mips_;
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#ifdef _DEBUG
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compilerEnabled_ = false;
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#endif
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while (mips->downcount >= 0) {
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while (mips->downcount >= 0) {
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u32 inst = Memory::ReadUnchecked_U32(mips->pc);
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u32 inst = Memory::ReadUnchecked_U32(mips->pc);
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u32 opcode = inst & 0xFF000000;
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u32 opcode = inst & 0xFF000000;
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@ -294,10 +302,19 @@ void IRJit::RunLoopUntil(u64 globalticks) {
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}
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}
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} else {
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} else {
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// RestoreRoundingMode(true);
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// RestoreRoundingMode(true);
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#ifdef _DEBUG
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compilerEnabled_ = true;
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#endif
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Compile(mips->pc);
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Compile(mips->pc);
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#ifdef _DEBUG
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compilerEnabled_ = false;
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#endif
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// ApplyRoundingMode(true);
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// ApplyRoundingMode(true);
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}
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}
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}
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}
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#ifdef _DEBUG
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compilerEnabled_ = true;
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#endif
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}
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}
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// RestoreRoundingMode(true);
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// RestoreRoundingMode(true);
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@ -437,14 +454,19 @@ void IRBlockCache::RemoveBlock(int blockIndex) {
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auto iter = std::find(byPage_[page].begin(), byPage_[page].end(), blockIndex);
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auto iter = std::find(byPage_[page].begin(), byPage_[page].end(), blockIndex);
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if (iter != byPage_[page].end()) {
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if (iter != byPage_[page].end()) {
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byPage_[page].erase(iter);
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byPage_[page].erase(iter);
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} else {
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WARN_LOG(Log::JIT, "RemoveBlock: Block at %08x was not found where expected in byPage table.", startAddr);
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}
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}
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}
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}
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// Additionally, we zap the block in the IR arena.
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// Additionally, we'd like to zap the block in the IR arena.
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// However, this breaks if calling sceKernelIcacheClearAll(), since as soon as we return, we'll be executing garbage.
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/*
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IRInst bad{ IROp::Bad };
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IRInst bad{ IROp::Bad };
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for (int off = block.GetIRArenaOffset(); off < (int)(block.GetIRArenaOffset() + block.GetNumIRInstructions()); off++) {
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for (int off = block.GetIRArenaOffset(); off < (int)(block.GetIRArenaOffset() + block.GetNumIRInstructions()); off++) {
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arena_[off] = bad;
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arena_[off] = bad;
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}
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}
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*/
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}
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}
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u32 IRBlockCache::AddressToPage(u32 addr) const {
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u32 IRBlockCache::AddressToPage(u32 addr) const {
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@ -248,6 +248,8 @@ protected:
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MIPSState *mips_;
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MIPSState *mips_;
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bool compilerEnabled_ = true;
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// where to write branch-likely trampolines. not used atm
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// where to write branch-likely trampolines. not used atm
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// u32 blTrampolines_;
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// u32 blTrampolines_;
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// int blTrampolineCount_;
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// int blTrampolineCount_;
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