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synced 2025-04-02 11:01:50 -04:00
Spend a bit less time in Read_Instruction on load.
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parent
e3506ead69
commit
eca06c60c7
5 changed files with 27 additions and 5 deletions
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@ -337,7 +337,7 @@ skip:
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for (u32 ahead = fromAddr; ahead < fromAddr + MAX_AHEAD_SCAN; ahead += 4) {
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MIPSOpcode aheadOp = Memory::Read_Instruction(ahead);
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u32 target = GetBranchTargetNoRA(ahead);
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u32 target = GetBranchTargetNoRA(ahead, aheadOp);
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if (target == INVALIDTARGET && ((aheadOp & 0xFC000000) == 0x08000000)) {
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target = GetJumpTarget(ahead);
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}
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@ -358,7 +358,7 @@ skip:
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if (closestJumpbackAddr != INVALIDTARGET && furthestJumpbackAddr == INVALIDTARGET) {
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for (u32 behind = closestJumpbackTarget; behind < fromAddr; behind += 4) {
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MIPSOpcode behindOp = Memory::Read_Instruction(behind);
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u32 target = GetBranchTargetNoRA(behind);
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u32 target = GetBranchTargetNoRA(behind, behindOp);
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if (target == INVALIDTARGET && ((behindOp & 0xFC000000) == 0x08000000)) {
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target = GetJumpTarget(behind);
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}
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@ -409,7 +409,7 @@ skip:
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}
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MIPSOpcode op = Memory::Read_Instruction(addr);
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u32 target = GetBranchTargetNoRA(addr);
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u32 target = GetBranchTargetNoRA(addr, op);
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if (target != INVALIDTARGET) {
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isStraightLeaf = false;
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if (target > furthestBranch) {
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@ -67,6 +67,11 @@ namespace MIPSCodeUtils
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u32 GetBranchTargetNoRA(u32 addr)
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{
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MIPSOpcode op = Memory::Read_Instruction(addr);
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return GetBranchTargetNoRA(addr, op);
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}
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u32 GetBranchTargetNoRA(u32 addr, MIPSOpcode op)
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{
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if (op != 0)
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{
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MIPSInfo info = MIPSGetInfo(op);
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@ -53,6 +53,7 @@ namespace MIPSCodeUtils
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u32 GetBranchTarget(u32 addr);
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// Ignores bltzal/etc. instructions that change RA.
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u32 GetBranchTargetNoRA(u32 addr);
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u32 GetBranchTargetNoRA(u32 addr, MIPSOpcode op);
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u32 GetJumpTarget(u32 addr);
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u32 GetSureBranchTarget(u32 addr);
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bool IsVFPUBranch(MIPSOpcode op);
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@ -176,9 +176,12 @@ void Clear()
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memset(m_pVRAM, 0, VRAM_SIZE);
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}
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Opcode Read_Instruction(u32 address, bool resolveReplacements)
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static Opcode Read_Instruction(u32 address, bool resolveReplacements, Opcode inst)
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{
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Opcode inst = Opcode(Read_U32(address));
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if (!MIPS_IS_EMUHACK(inst.encoding)) {
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return inst;
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}
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if (MIPS_IS_RUNBLOCK(inst.encoding) && MIPSComp::jit) {
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JitBlockCache *bc = MIPSComp::jit->GetBlockCache();
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int block_num = bc->GetBlockNumberFromEmuHackOp(inst, true);
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@ -218,6 +221,18 @@ Opcode Read_Instruction(u32 address, bool resolveReplacements)
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}
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}
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Opcode Read_Instruction(u32 address, bool resolveReplacements)
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{
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Opcode inst = Opcode(Read_U32(address));
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return Read_Instruction(address, resolveReplacements, inst);
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}
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Opcode ReadUnchecked_Instruction(u32 address, bool resolveReplacements)
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{
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Opcode inst = Opcode(ReadUnchecked_U32(address));
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return Read_Instruction(address, resolveReplacements, inst);
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}
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Opcode Read_Opcode_JIT(u32 address)
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{
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Opcode inst = Opcode(Read_U32(address));
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@ -140,6 +140,7 @@ void Write_Opcode_JIT(const u32 _Address, const Opcode _Value);
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// Should be used by analyzers, disassemblers etc. Does resolve replacements.
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Opcode Read_Instruction(const u32 _Address, bool resolveReplacements = false);
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Opcode ReadUnchecked_Instruction(const u32 _Address, bool resolveReplacements = false);
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u8 Read_U8(const u32 _Address);
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u16 Read_U16(const u32 _Address);
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