From dc05051696c9415dba9e19170d2e340d4d87154e Mon Sep 17 00:00:00 2001 From: "Unknown W. Brackets" Date: Thu, 5 Sep 2013 23:27:51 -0700 Subject: [PATCH] Add more reporting for cpu instructions. --- Core/MIPS/MIPSIntVFPU.cpp | 4 +++- Core/MIPS/x86/CompBranch.cpp | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/Core/MIPS/MIPSIntVFPU.cpp b/Core/MIPS/MIPSIntVFPU.cpp index b91a5d582a..2829392d60 100644 --- a/Core/MIPS/MIPSIntVFPU.cpp +++ b/Core/MIPS/MIPSIntVFPU.cpp @@ -1365,6 +1365,7 @@ namespace MIPSInt } else { + Reporting::ReportMessage("Trying to interpret instruction that can't be interpreted (BADVTFM)"); _dbg_assert_msg_(CPU,0,"Trying to interpret instruction that can't be interpreted (BADVTFM)"); } WriteVector(d, sz, vd); @@ -1675,7 +1676,7 @@ namespace MIPSInt } else { - _dbg_assert_msg_(CPU,0,"Bad Imm3 in cmov"); + ERROR_LOG_REPORT(CPU, "Bad Imm3 in cmov: %d", imm3); } ApplyPrefixD(d, sz); WriteVector(d, sz, vd); @@ -1756,6 +1757,7 @@ bad: break; default: + Reporting::ReportMessage("CrossQuat instruction with wrong size"); _dbg_assert_msg_(CPU,0,"Trying to interpret instruction that can't be interpreted"); break; } diff --git a/Core/MIPS/x86/CompBranch.cpp b/Core/MIPS/x86/CompBranch.cpp index 6d85407999..bd92beb4d6 100644 --- a/Core/MIPS/x86/CompBranch.cpp +++ b/Core/MIPS/x86/CompBranch.cpp @@ -466,7 +466,7 @@ void Jit::BranchVFPUFlag(MIPSOpcode op, Gen::CCFlags cc, bool likely) if (!likely && delaySlotIsNice) CompileDelaySlot(DELAYSLOT_NICE); if (delaySlotIsBranch && (signed short)(delaySlotOp & 0xFFFF) != (signed short)(op & 0xFFFF) - 1) - ERROR_LOG(JIT, "VFPU branch in VFPU delay slot at %08x with different target %d / %d", js.compilerPC, (signed short)(delaySlotOp & 0xFFFF), (signed short)(op & 0xFFFF) - 1); + ERROR_LOG_REPORT(JIT, "VFPU branch in VFPU delay slot at %08x with different target %d / %d", js.compilerPC, (signed short)(delaySlotOp & 0xFFFF), (signed short)(op & 0xFFFF) - 1); // THE CONDITION int imm3 = (op >> 18) & 7;