From d823989330ee292c1b05114188a3390a88a52dc7 Mon Sep 17 00:00:00 2001
From: "Unknown W. Brackets" <checkins@unknownbrackets.org>
Date: Thu, 4 Jul 2013 18:16:57 -0700
Subject: [PATCH] Implement vmone/vmzero/vmidt for the x86 jit.

---
 Core/MIPS/ARM/ArmCompVFPU.cpp |  5 ++++
 Core/MIPS/ARM/ArmJit.h        |  1 +
 Core/MIPS/MIPSIntVFPU.cpp     |  4 ++--
 Core/MIPS/MIPSTables.cpp      |  6 ++---
 Core/MIPS/x86/CompVFPU.cpp    | 43 +++++++++++++++++++++++++++++++++++
 Core/MIPS/x86/Jit.h           |  1 +
 6 files changed, 55 insertions(+), 5 deletions(-)

diff --git a/Core/MIPS/ARM/ArmCompVFPU.cpp b/Core/MIPS/ARM/ArmCompVFPU.cpp
index 8731a7422f..e7cb29df72 100644
--- a/Core/MIPS/ARM/ArmCompVFPU.cpp
+++ b/Core/MIPS/ARM/ArmCompVFPU.cpp
@@ -431,6 +431,11 @@ namespace MIPSComp
 		fpr.ReleaseSpillLocks();
 	}
 
+	void Jit::Comp_VMatrixInit(u32 op)
+	{
+		CONDITIONAL_DISABLE;
+	}
+
 	void Jit::Comp_VDot(u32 op)
 	{
 		// DISABLE;
diff --git a/Core/MIPS/ARM/ArmJit.h b/Core/MIPS/ARM/ArmJit.h
index ec8d46796d..2bd36823a6 100644
--- a/Core/MIPS/ARM/ArmJit.h
+++ b/Core/MIPS/ARM/ArmJit.h
@@ -192,6 +192,7 @@ public:
 	void Comp_SVQ(u32 op);
 	void Comp_VPFX(u32 op);
 	void Comp_VVectorInit(u32 op);
+	void Comp_VMatrixInit(u32 op);
 	void Comp_VDot(u32 op);
 	void Comp_VecDo3(u32 op);
 	void Comp_VV2Op(u32 op);
diff --git a/Core/MIPS/MIPSIntVFPU.cpp b/Core/MIPS/MIPSIntVFPU.cpp
index 9acdd1b0a2..8a03d2c694 100644
--- a/Core/MIPS/MIPSIntVFPU.cpp
+++ b/Core/MIPS/MIPSIntVFPU.cpp
@@ -331,8 +331,8 @@ namespace MIPSInt
 		switch ((op >> 16) & 0xF)
 		{
 		case 3: m=idt; break; //identity   // vmidt
-		case 6: m=zero; break;             // vzero
-		case 7: m=one; break;              // vone
+		case 6: m=zero; break;             // vmzero
+		case 7: m=one; break;              // vmone
 		default:
 			_dbg_assert_msg_(CPU,0,"Trying to interpret instruction that can't be interpreted");
 			return;
diff --git a/Core/MIPS/MIPSTables.cpp b/Core/MIPS/MIPSTables.cpp
index 7326a66a27..03ae1572fe 100644
--- a/Core/MIPS/MIPSTables.cpp
+++ b/Core/MIPS/MIPSTables.cpp
@@ -672,12 +672,12 @@ const MIPSInstruction tableVFPUMatrixSet1[16] = //111100 11100 0xxxx   (rm x is
 	INSTR("vmmov",&Jit::Comp_Vmmov, Dis_MatrixSet2, Int_Vmmov, IS_VFPU|OUT_EAT_PREFIX),
 	{-2},
 	{-2},
-	INSTR("vmidt",&Jit::Comp_Generic, Dis_MatrixSet1, Int_VMatrixInit, IS_VFPU|OUT_EAT_PREFIX),
+	INSTR("vmidt",&Jit::Comp_VMatrixInit, Dis_MatrixSet1, Int_VMatrixInit, IS_VFPU|OUT_EAT_PREFIX),
 
 	{-2},
 	{-2},
-	INSTR("vmzero", &Jit::Comp_Generic, Dis_MatrixSet1, Int_VMatrixInit, IS_VFPU|OUT_EAT_PREFIX),
-	INSTR("vmone",  &Jit::Comp_Generic, Dis_MatrixSet1, Int_VMatrixInit, IS_VFPU|OUT_EAT_PREFIX),
+	INSTR("vmzero", &Jit::Comp_VMatrixInit, Dis_MatrixSet1, Int_VMatrixInit, IS_VFPU|OUT_EAT_PREFIX),
+	INSTR("vmone",  &Jit::Comp_VMatrixInit, Dis_MatrixSet1, Int_VMatrixInit, IS_VFPU|OUT_EAT_PREFIX),
 
 	{-2},{-2},{-2},{-2},
   {-2},{-2},{-2},{-2},
diff --git a/Core/MIPS/x86/CompVFPU.cpp b/Core/MIPS/x86/CompVFPU.cpp
index 97db741b4e..f744e7480a 100644
--- a/Core/MIPS/x86/CompVFPU.cpp
+++ b/Core/MIPS/x86/CompVFPU.cpp
@@ -824,6 +824,49 @@ void Jit::Comp_Vmtvc(u32 op) {
 	}
 }
 
+void Jit::Comp_VMatrixInit(u32 op) {
+	CONDITIONAL_DISABLE;
+
+	if (js.HasUnknownPrefix())
+		DISABLE;
+
+	MatrixSize sz = GetMtxSize(op);
+	int n = GetMatrixSide(sz);
+
+	u8 dregs[16];
+	GetMatrixRegs(dregs, sz, _VD);
+
+	switch ((op >> 16) & 0xF) {
+	case 3: // vmidt
+		MOVSS(XMM0, M((void *) &zero));
+		MOVSS(XMM1, M((void *) &one));
+		for (int a = 0; a < n; a++) {
+			for (int b = 0; b < n; b++) {
+				MOVSS(fpr.V(dregs[a * 4 + b]), a == b ? XMM1 : XMM0);
+			}
+		}
+		break;
+	case 6: // vmzero
+		MOVSS(XMM0, M((void *) &zero));
+		for (int a = 0; a < n; a++) {
+			for (int b = 0; b < n; b++) {
+				MOVSS(fpr.V(dregs[a * 4 + b]), XMM0);
+			}
+		}
+		break;
+	case 7: // vmone
+		MOVSS(XMM0, M((void *) &one));
+		for (int a = 0; a < n; a++) {
+			for (int b = 0; b < n; b++) {
+				MOVSS(fpr.V(dregs[a * 4 + b]), XMM0);
+			}
+		}
+		break;
+	}
+
+	fpr.ReleaseSpillLocks();
+}
+
 void Jit::Comp_Vmmov(u32 op) {
 	CONDITIONAL_DISABLE;
 
diff --git a/Core/MIPS/x86/Jit.h b/Core/MIPS/x86/Jit.h
index 1a30fe0c03..b3f2054217 100644
--- a/Core/MIPS/x86/Jit.h
+++ b/Core/MIPS/x86/Jit.h
@@ -201,6 +201,7 @@ public:
 	void Comp_SVQ(u32 op);
 	void Comp_VPFX(u32 op);
 	void Comp_VVectorInit(u32 op);
+	void Comp_VMatrixInit(u32 op);
 	void Comp_VDot(u32 op);
 	void Comp_VecDo3(u32 op);
 	void Comp_VV2Op(u32 op);