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Fix a bad assertion.
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1 changed files with 1 additions and 1 deletions
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@ -220,7 +220,7 @@ public:
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}
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const u32 IMMSR() // IMM shifted register
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{
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_assert_msg_(DYNA_REC, Type = TYPE_IMMSREG, "IMMSR must be imm shifted register");
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_assert_msg_(DYNA_REC, Type == TYPE_IMMSREG, "IMMSR must be imm shifted register");
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return ((IndexOrShift & 0x1f) << 7 | (Shift << 5) | Value);
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}
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const u32 RSR() // Register shifted register
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