diff --git a/Core/MIPS/ARM/ArmJit.cpp b/Core/MIPS/ARM/ArmJit.cpp
index 9ff285102a..48f34e3401 100644
--- a/Core/MIPS/ARM/ArmJit.cpp
+++ b/Core/MIPS/ARM/ArmJit.cpp
@@ -132,7 +132,7 @@ void Jit::CompileAt(u32 addr)
 
 void Jit::EatInstruction(u32 op)
 {
-	u32 info = MIPSGetInfo(op);
+	MIPSInfo info = MIPSGetInfo(op);
 	_dbg_assert_msg_(JIT, !(info & DELAYSLOT), "Never eat a branch op.");
 	_dbg_assert_msg_(JIT, !js.inDelaySlot, "Never eat an instruction inside a delayslot.");
 
@@ -286,7 +286,7 @@ void Jit::Comp_Generic(u32 op)
 		RestoreDowncount();
 	}
 
-	const int info = MIPSGetInfo(op);
+	const MIPSInfo info = MIPSGetInfo(op);
 	if ((info & IS_VFPU) != 0 && (info & VFPU_NO_PREFIX) == 0)
 	{
 		// If it does eat them, it'll happen in MIPSCompileOp().
diff --git a/Core/MIPS/MIPSAnalyst.cpp b/Core/MIPS/MIPSAnalyst.cpp
index 63e8300b2e..84eeb729e9 100644
--- a/Core/MIPS/MIPSAnalyst.cpp
+++ b/Core/MIPS/MIPSAnalyst.cpp
@@ -36,7 +36,7 @@ namespace MIPSAnalyst
 
 	int GetOutReg(u32 op)
 	{
-		u32 opinfo = MIPSGetInfo(op);
+		MIPSInfo opinfo = MIPSGetInfo(op);
 		if (opinfo & OUT_RT)
 			return MIPS_GET_RT(op);
 		if (opinfo & OUT_RD)
@@ -48,15 +48,15 @@ namespace MIPSAnalyst
 
 	bool ReadsFromReg(u32 op, u32 reg)
 	{
-		u32 opinfo = MIPSGetInfo(op);
+		MIPSInfo opinfo = MIPSGetInfo(op);
 		if (opinfo & IN_RT)
 		{
-			if (MIPS_GET_RT(opinfo) == reg)
+			if (MIPS_GET_RT(op) == reg)
 				return true;
 		}
 		if (opinfo & IN_RS)
 		{
-			if (MIPS_GET_RS(opinfo) == reg)
+			if (MIPS_GET_RS(op) == reg)
 				return true;
 		}
 		return false; //TODO: there are more cases!
@@ -132,7 +132,7 @@ namespace MIPSAnalyst
 		while (true)
 		{
 			u32 op = Memory::Read_Instruction(addr);
-			u32 info = MIPSGetInfo(op);
+			MIPSInfo info = MIPSGetInfo(op);
 
 			for (int reg=0; reg < 32; reg++)
 			{
@@ -241,7 +241,7 @@ namespace MIPSAnalyst
 		while (true)
 		{
 			u32 op = Memory::Read_Instruction(addr);
-			u32 info = MIPSGetInfo(op);
+			MIPSInfo info = MIPSGetInfo(op);
 
 			if ((info & IN_RS) && (MIPS_GET_RS(op) == reg))
 				return true;
@@ -272,7 +272,7 @@ namespace MIPSAnalyst
 			{
 				u32 validbits = 0xFFFFFFFF;
 				u32 instr = Memory::Read_Instruction(addr);
-				u32 flags = MIPSGetInfo(instr);
+				MIPSInfo flags = MIPSGetInfo(instr);
 				if (flags & IN_IMM16)
 					validbits&=~0xFFFF;
 				if (flags & IN_IMM26)
@@ -455,7 +455,7 @@ namespace MIPSAnalyst
 	std::vector<int> GetInputRegs(u32 op)
 	{
 		std::vector<int> vec;
-		u32 info = MIPSGetInfo(op);
+		MIPSInfo info = MIPSGetInfo(op);
 		if ((info & IS_VFPU) == 0)
 		{
 			if (info & IN_RS) vec.push_back(MIPS_GET_RS(op));
@@ -466,7 +466,7 @@ namespace MIPSAnalyst
 	std::vector<int> GetOutputRegs(u32 op)
 	{
 		std::vector<int> vec;
-		u32 info = MIPSGetInfo(op);
+		MIPSInfo info = MIPSGetInfo(op);
 		if ((info & IS_VFPU) == 0)
 		{
 			if (info & OUT_RD) vec.push_back(MIPS_GET_RD(op));
@@ -490,7 +490,7 @@ namespace MIPSAnalyst
 		info.encodedOpcode = Memory::Read_Instruction(address);
 
 		u32 op = info.encodedOpcode;		
-		u32 opInfo = MIPSGetInfo(op);
+		MIPSInfo opInfo = MIPSGetInfo(op);
 		info.isLikelyBranch = (opInfo & LIKELY) != 0;
 		
 		//j , jal, ...
diff --git a/Core/MIPS/MIPSAnalyst.h b/Core/MIPS/MIPSAnalyst.h
index 7167e8287a..510981d580 100644
--- a/Core/MIPS/MIPSAnalyst.h
+++ b/Core/MIPS/MIPSAnalyst.h
@@ -37,7 +37,6 @@ namespace MIPSAnalyst
 		int readCount;
 		int writeCount;
 		int readAsAddrCount;
-		bool usesVFPU;
 
 		int TotalReadCount() {return readCount + readAsAddrCount;}
 		int FirstRead() {return firstReadAsAddr < firstRead ? firstReadAsAddr : firstRead;}
diff --git a/Core/MIPS/MIPSCodeUtils.cpp b/Core/MIPS/MIPSCodeUtils.cpp
index 43a112a166..b5f22005ad 100644
--- a/Core/MIPS/MIPSCodeUtils.cpp
+++ b/Core/MIPS/MIPSCodeUtils.cpp
@@ -34,7 +34,7 @@ namespace MIPSCodeUtils
 		u32 op = Memory::Read_Instruction(addr);
 		if (op)
 		{
-			u32 info = MIPSGetInfo(op);
+			MIPSInfo info = MIPSGetInfo(op);
 			if ((info & IS_JUMP) && (info & IN_IMM26))
 			{
 				u32 target = (addr & 0xF0000000) | ((op&0x03FFFFFF) << 2);
@@ -52,7 +52,7 @@ namespace MIPSCodeUtils
 		u32 op = Memory::Read_Instruction(addr);
 		if (op)
 		{
-			u32 info = MIPSGetInfo(op);
+			MIPSInfo info = MIPSGetInfo(op);
 			if (info & IS_CONDBRANCH)
 			{
 				return addr + 4 + ((signed short)(op&0xFFFF)<<2);
@@ -69,7 +69,7 @@ namespace MIPSCodeUtils
 		u32 op = Memory::Read_Instruction(addr);
 		if (op)
 		{
-			u32 info = MIPSGetInfo(op);
+			MIPSInfo info = MIPSGetInfo(op);
 			if ((info & IS_CONDBRANCH) && !(info & OUT_RA))
 			{
 				return addr + 4 + ((signed short)(op&0xFFFF)<<2);
@@ -86,7 +86,7 @@ namespace MIPSCodeUtils
 		u32 op = Memory::Read_Instruction(addr);
 		if (op)
 		{
-			u32 info = MIPSGetInfo(op);
+			MIPSInfo info = MIPSGetInfo(op);
 			if (info & IS_CONDBRANCH)
 			{
 				bool sure;
diff --git a/Core/MIPS/MIPSInt.cpp b/Core/MIPS/MIPSInt.cpp
index 47d22a5130..119f614033 100644
--- a/Core/MIPS/MIPSInt.cpp
+++ b/Core/MIPS/MIPSInt.cpp
@@ -72,7 +72,7 @@ int MIPS_SingleStep()
 #endif
 	/*
 	// Choke on VFPU
-	u32 info = MIPSGetInfo(op);
+	MIPSInfo info = MIPSGetInfo(op);
 	if (info & IS_VFPU)
 	{
 		if (!Core_IsStepping() && !GetAsyncKeyState(VK_LSHIFT))
diff --git a/Core/MIPS/MIPSTables.cpp b/Core/MIPS/MIPSTables.cpp
index 2c11791803..e8c46a8dfd 100644
--- a/Core/MIPS/MIPSTables.cpp
+++ b/Core/MIPS/MIPSTables.cpp
@@ -71,7 +71,7 @@ struct MIPSInstruction
 #endif
 	MIPSInterpretFunc interpret;
 	//MIPSInstructionInfo information;
-	u32 flags;
+	MIPSInfo flags;
 };
 
 #define INVALID {-2}
@@ -80,7 +80,7 @@ struct MIPSInstruction
 
 #ifndef FINAL
 #define ENCODING(a) {a}
-#define INSTR(name, comp, dis, inter, flags) {-1, N(name), comp, dis, inter, flags}
+#define INSTR(name, comp, dis, inter, flags) {-1, N(name), comp, dis, inter, MIPSInfo(flags)}
 #else
 #define ENCODING(a) {a}
 #define INSTR(name, comp, dis, inter, flags) {-1, comp, inter, flags}
@@ -924,7 +924,7 @@ void MIPSCompileOp(u32 op)
 	if (op==0)
 		return;
 	const MIPSInstruction *instr = MIPSGetInstruction(op);
-	const int info = MIPSGetInfo(op);
+	const MIPSInfo info = MIPSGetInfo(op);
 	if (instr)
 	{
 		if (instr->compile)
@@ -1018,7 +1018,7 @@ int MIPSInterpret_RunUntil(u64 globalTicks)
 				//u32 op = Memory::Read_Opcode_JIT(mipsr4k.pc);
 				/*
 				// Choke on VFPU
-				u32 info = MIPSGetInfo(op);
+				MIPSInfo info = MIPSGetInfo(op);
 				if (info & IS_VFPU)
 				{
 					if (!Core_IsStepping() && !GetAsyncKeyState(VK_LSHIFT))
@@ -1089,14 +1089,14 @@ const char *MIPSGetName(u32 op)
 		return instr->name;
 }
 
-u32 MIPSGetInfo(u32 op)
+MIPSInfo MIPSGetInfo(u32 op)
 {
 	//	int crunch = CRUNCH_MIPS_OP(op);
 	const MIPSInstruction *instr = MIPSGetInstruction(op);
 	if (instr)
 		return instr->flags;
 	else
-		return 0;
+		return MIPSInfo(BAD_INSTRUCTION);
 }
 
 MIPSInterpretFunc MIPSGetInterpretFunc(u32 op)
@@ -1111,7 +1111,7 @@ MIPSInterpretFunc MIPSGetInterpretFunc(u32 op)
 // TODO: Do something that makes sense here.
 int MIPSGetInstructionCycleEstimate(u32 op)
 {
-	u32 info = MIPSGetInfo(op);
+	MIPSInfo info = MIPSGetInfo(op);
 	if (info & DELAYSLOT)
 		return 2;
 	else
diff --git a/Core/MIPS/MIPSTables.h b/Core/MIPS/MIPSTables.h
index 439e9c9fc2..2264aaa698 100644
--- a/Core/MIPS/MIPSTables.h
+++ b/Core/MIPS/MIPSTables.h
@@ -17,7 +17,22 @@
 
 #pragma once
 
-#include "../../Globals.h"
+#include "Globals.h"
+
+struct MIPSInfo {
+	MIPSInfo() {
+		value = 0;
+	}
+
+	explicit MIPSInfo(u32 v) : value(v) {
+	}
+
+	u32 operator & (const u32 &arg) const {
+		return value & arg;
+	}
+
+	u32 value;
+};
 
 #define CONDTYPE_MASK	0x00000007
 #define CONDTYPE_EQ		0x00000001
@@ -40,32 +55,31 @@
 #define IS_CONDMOVE		0x00000008
 #define DELAYSLOT       0x00000010
 #define BAD_INSTRUCTION 0x00000020
-#define UNCONDITIONAL   0x00000040
-#define LIKELY          0x00000080
-#define IS_CONDBRANCH   0x00000100
-#define IS_JUMP         0x00000200
+#define LIKELY          0x00000040
+#define IS_CONDBRANCH   0x00000080
+#define IS_JUMP         0x00000100
 
-#define IN_RS           0x00000400
-#define IN_RS_ADDR      (0x00000800 | IN_RS)
-#define IN_RS_SHIFT     (0x00001000 | IN_RS)
-#define IN_RT           0x00002000
-#define IN_SA           0x00004000
-#define IN_IMM16        0x00008000
-#define IN_IMM26        0x00010000
-#define IN_MEM          0x00020000
-#define IN_OTHER        0x00040000
-#define IN_FPUFLAG      0x00080000
+#define IN_RS           0x00000200
+#define IN_RS_ADDR      (0x00000400 | IN_RS)
+#define IN_RS_SHIFT     (0x00000800 | IN_RS)
+#define IN_RT           0x00001000
+#define IN_SA           0x00002000
+#define IN_IMM16        0x00004000
+#define IN_IMM26        0x00008000
+#define IN_MEM          0x00010000
+#define IN_OTHER        0x00020000
+#define IN_FPUFLAG      0x00040000
 
-#define OUT_RT          0x00100000
-#define OUT_RD          0x00200000
-#define OUT_RA          0x00400000
-#define OUT_MEM         0x00800000
-#define OUT_OTHER       0x01000000
-#define OUT_FPUFLAG     0x02000000
-#define OUT_EAT_PREFIX  0x04000000
+#define OUT_RT          0x00080000
+#define OUT_RD          0x00100000
+#define OUT_RA          0x00200000
+#define OUT_MEM         0x00400000
+#define OUT_OTHER       0x00800000
+#define OUT_FPUFLAG     0x01000000
+#define OUT_EAT_PREFIX  0x02000000
 
-#define VFPU_NO_PREFIX  0x08000000
-#define IS_VFPU         0x80000000
+#define VFPU_NO_PREFIX  0x04000000
+#define IS_VFPU         0x08000000
 
 #ifndef CDECL
 #define CDECL
@@ -77,7 +91,7 @@ typedef void (CDECL *MIPSInterpretFunc)(u32 opcode);
 
 void MIPSCompileOp(u32 op);
 void MIPSDisAsm(u32 op, u32 pc, char *out, bool tabsToSpaces = false);
-u32  MIPSGetInfo(u32 op);
+MIPSInfo MIPSGetInfo(u32 op);
 void MIPSInterpret(u32 op); //only for those rare ones
 int MIPSInterpret_RunUntil(u64 globalTicks);
 MIPSInterpretFunc MIPSGetInterpretFunc(u32 op);
diff --git a/Core/MIPS/x86/CompBranch.cpp b/Core/MIPS/x86/CompBranch.cpp
index f03a4920ee..44451de1e3 100644
--- a/Core/MIPS/x86/CompBranch.cpp
+++ b/Core/MIPS/x86/CompBranch.cpp
@@ -78,7 +78,7 @@ static void JitBranchLog(u32 op, u32 pc)
 	currentMIPS->inDelaySlot = false;
 
 	MIPSInterpretFunc func = MIPSGetInterpretFunc(op);
-	u32 info = MIPSGetInfo(op);
+	MIPSInfo info = MIPSGetInfo(op);
 	func(op);
 
 	// Branch taken, use nextPC.
diff --git a/Core/MIPS/x86/Jit.cpp b/Core/MIPS/x86/Jit.cpp
index c73e6a5691..5e1eebd38e 100644
--- a/Core/MIPS/x86/Jit.cpp
+++ b/Core/MIPS/x86/Jit.cpp
@@ -229,7 +229,7 @@ void Jit::CompileAt(u32 addr)
 
 void Jit::EatInstruction(u32 op)
 {
-	u32 info = MIPSGetInfo(op);
+	MIPSInfo info = MIPSGetInfo(op);
 	_dbg_assert_msg_(JIT, !(info & DELAYSLOT), "Never eat a branch op.");
 	_dbg_assert_msg_(JIT, !js.inDelaySlot, "Never eat an instruction inside a delayslot.");
 
@@ -361,7 +361,7 @@ void Jit::Comp_Generic(u32 op)
 	else
 		ERROR_LOG_REPORT(JIT, "Trying to compile instruction that can't be interpreted");
 
-	const int info = MIPSGetInfo(op);
+	const MIPSInfo info = MIPSGetInfo(op);
 	if ((info & IS_VFPU) != 0 && (info & VFPU_NO_PREFIX) == 0)
 	{
 		// If it does eat them, it'll happen in MIPSCompileOp().