From accd9b1f2ca249fefb3cc393793bdd2a33308ff8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Henrik=20Rydg=C3=A5rd?= <hrydgard@gmail.com>
Date: Mon, 11 Sep 2023 14:10:02 +0200
Subject: [PATCH] sc instruction: Make sure the rt register is mapped. Fixes
 Beats.

---
 Core/MIPS/x86/CompLoadStore.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Core/MIPS/x86/CompLoadStore.cpp b/Core/MIPS/x86/CompLoadStore.cpp
index 603e3e367a..64d6c1773d 100644
--- a/Core/MIPS/x86/CompLoadStore.cpp
+++ b/Core/MIPS/x86/CompLoadStore.cpp
@@ -429,6 +429,7 @@ namespace MIPSComp {
 			skipStore = J_CC(CC_NE);
 
 			CompITypeMemWrite(op, 32, safeMemFuncs.writeU32);
+			gpr.MapReg(rt, true, true);
 			MOV(32, gpr.R(rt), Imm32(1));
 			finish = J();