From ac40721a646fdf3a904faea8cbb4b41ee7acd9dd Mon Sep 17 00:00:00 2001 From: "Unknown W. Brackets" Date: Sat, 29 Apr 2023 10:07:50 -0700 Subject: [PATCH] riscv: Use cpu_features for V detection. --- Common/RiscVCPUDetect.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Common/RiscVCPUDetect.cpp b/Common/RiscVCPUDetect.cpp index b4f8b608d8..55165116bd 100644 --- a/Common/RiscVCPUDetect.cpp +++ b/Common/RiscVCPUDetect.cpp @@ -209,8 +209,8 @@ void CPUInfo::Detect() RiscV_C = ExtensionSupported(hwcap, 'C'); RiscV_V = ExtensionSupported(hwcap, 'V'); RiscV_B = ExtensionSupported(hwcap, 'B'); - // Let's assume for now... - RiscV_Zicsr = RiscV_M && RiscV_A && RiscV_F && RiscV_D; + // We assume as in RVA20U64 that F means Zicsr is available. + RiscV_Zicsr = RiscV_F; #ifdef USE_CPU_FEATURES cpu_features::RiscvInfo info = cpu_features::GetRiscvInfo(); @@ -220,6 +220,7 @@ void CPUInfo::Detect() RiscV_F = info.features.F; RiscV_D = info.features.D; RiscV_C = info.features.C; + RiscV_V = info.features.V; RiscV_Zicsr = info.features.Zicsr; truncate_cpy(brand_string, info.uarch);