From aae32bd929e9aed2cd4444477960028b0325d3eb Mon Sep 17 00:00:00 2001 From: Henrik Rydgard Date: Sun, 8 May 2016 02:47:19 +0200 Subject: [PATCH] ir-jit: Re-enable mult. Fix bvf/bvt --- Core/MIPS/IR/IRCompALU.cpp | 1 - Core/MIPS/IR/IRCompBranch.cpp | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/Core/MIPS/IR/IRCompALU.cpp b/Core/MIPS/IR/IRCompALU.cpp index fd5944fd06..46c43ded73 100644 --- a/Core/MIPS/IR/IRCompALU.cpp +++ b/Core/MIPS/IR/IRCompALU.cpp @@ -305,7 +305,6 @@ void IRJit::Comp_Allegrex2(MIPSOpcode op) { void IRJit::Comp_MulDivType(MIPSOpcode op) { CONDITIONAL_DISABLE; - DISABLE; MIPSGPReg rt = _RT; MIPSGPReg rs = _RS; MIPSGPReg rd = _RD; diff --git a/Core/MIPS/IR/IRCompBranch.cpp b/Core/MIPS/IR/IRCompBranch.cpp index 2b478f695a..0cf3e7d8f7 100644 --- a/Core/MIPS/IR/IRCompBranch.cpp +++ b/Core/MIPS/IR/IRCompBranch.cpp @@ -237,7 +237,7 @@ void IRJit::BranchVFPUFlag(MIPSOpcode op, IRComparison cc, bool likely) { u32 notTakenTarget = GetCompilerPC() + (delaySlotIsBranch ? 4 : 8); - ir.Write(IROp::AndConst, IRTEMP_0, IRTEMP_0, ir.AddConstant(imm3)); + ir.Write(IROp::AndConst, IRTEMP_0, IRTEMP_0, ir.AddConstant(1 << imm3)); FlushAll(); ir.Write(ComparisonToExit(cc), ir.AddConstant(notTakenTarget), IRTEMP_0, 0);