Emulation/ppsspp
1
0
Fork 0
mirror of https://github.com/hrydgard/ppsspp.git synced 2025-04-02 11:01:50 -04:00
Code Issues Projects Releases Packages Wiki Activity

Merge pull request #7260 from unknownbrackets/jit-minor

Browse source 
armjit: Fix vfad/vavg sign for -0.000
This commit is contained in:
Henrik Rydgård 2015-01-03 20:35:10 +01:00
commit 8a72fe3cb1
2 changed files with 8 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
Core/MIPS/ARM/ArmCompVFPU.cpp
View file

@ -663,8 +663,9 @@ namespace MIPSComp
if (is_vavg) {
MOVI2F(S1, vavg_table[n - 1], R0);
}
VMOV(S0, fpr.V(sregs[0]));
for (int i = 1; i < n; i++) {
// Have to start at +0.000 for the correct sign.
MOVI2F(S0, 0.0f, SCRATCHREG1);
for (int i = 0; i < n; i++) {
// sum += s[i];
VADD(S0, S0, fpr.V(sregs[i]));
}

7
Core/MIPS/ARM/ArmCompVFPUNEON.cpp
View file

@ -1069,6 +1069,7 @@ void ArmJit::CompNEON_Vhoriz(MIPSOpcode op) {
switch ((op >> 16) & 31) {
case 6: // vfad
{
VMOV_neon(F_32, D1, 0.0f);
MappedRegs r = NEONMapDirtyIn(op, V_Single, sz);
switch (sz) {
case V_Pair:
@ -1079,12 +1080,14 @@ void ArmJit::CompNEON_Vhoriz(MIPSOpcode op) {
VADD(F_32, r.vd, D0, D_1(r.vs));
break;
case V_Quad:
VADD(F_32, R0, D_0(r.vs), D_1(r.vs));
VPADD(F_32, r.vd, R0, R0);
VADD(F_32, D0, D_0(r.vs), D_1(r.vs));
VPADD(F_32, r.vd, D0, D0);
break;
default:
;
}
// This forces the sign of -0.000 to +0.000.
VADD(F_32, r.vd, r.vd, D1);
break;
}