diff --git a/Core/MIPS/ARM64/Arm64Jit.cpp b/Core/MIPS/ARM64/Arm64Jit.cpp
index ba9c8cc15d..a5c1f12a89 100644
--- a/Core/MIPS/ARM64/Arm64Jit.cpp
+++ b/Core/MIPS/ARM64/Arm64Jit.cpp
@@ -255,10 +255,9 @@ const u8 *Arm64Jit::DoJit(u32 em_address, JitBlock *b)
 	} else if (jo.enableBlocklink) {
 		b->checkedEntry = GetCodePtr();
 		MOVI2R(SCRATCH1, js.blockStart);
-		// A conditional branch can't reach all the way to the dispatcher :/
-		//FixupBranch skip = B(CC_GE);
-		//B((const void *)outerLoopPCInSCRATCH1, SCRATCH2);
-		//SetJumpTarget(skip);
+		FixupBranch skip = B(CC_GE);
+		B((const void *)outerLoopPCInSCRATCH1);
+		SetJumpTarget(skip);
 	} else {
 		// No block linking, no need to add headers to blocks.
 	}
diff --git a/Core/MIPS/ARM64/Arm64Jit.h b/Core/MIPS/ARM64/Arm64Jit.h
index 38e8571259..c0f72b070c 100644
--- a/Core/MIPS/ARM64/Arm64Jit.h
+++ b/Core/MIPS/ARM64/Arm64Jit.h
@@ -37,7 +37,7 @@ namespace MIPSComp
 struct Arm64JitOptions
 {
 	Arm64JitOptions()  {
-		enableBlocklink = false;
+		enableBlocklink = true;
 		useBackJump = false;
 		useForwardJump = false;
 		cachePointers = true;
diff --git a/Core/MIPS/JitCommon/JitBlockCache.cpp b/Core/MIPS/JitCommon/JitBlockCache.cpp
index 235468139f..07e8b491f8 100644
--- a/Core/MIPS/JitCommon/JitBlockCache.cpp
+++ b/Core/MIPS/JitCommon/JitBlockCache.cpp
@@ -445,7 +445,9 @@ void JitBlockCache::LinkBlockExits(int i) {
 				b.linkStatus[e] = true;
 #elif defined(ARM64)
 				ARM64XEmitter emit(b.exitPtrs[e]);
-				// TODO ARM64 - must be done before enabling block linking
+				emit.B(blocks_[destinationBlock].checkedEntry);
+				emit.FlushIcache();
+				b.linkStatus[e] = true;
 #endif
 			}
 		}