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ARM64: Store zeroes using WZR

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This commit is contained in:
Henrik Rydgard 2015-07-11 22:12:41 +02:00
parent 1ba2b1cfae
commit 56f9aaa164
1 changed files with 16 additions and 9 deletions
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25
Core/MIPS/ARM64/Arm64CompLoadStore.cpp
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@ -350,17 +350,24 @@ namespace MIPSComp {
(dataSize == 1 || (offset & (dataSize - 1)) == 0)) { // Check that the offset is aligned to the access size as that's required for INDEX_UNSIGNED encodings. we can get here through fallback from lwl/lwr
gpr.SpillLock(rs, rt);
gpr.MapRegAsPointer(rs);
gpr.MapReg(rt, load ? MAP_NOINIT : 0);
Arm64Gen::ARM64Reg ar;
if (rt != MIPS_REG_ZERO) {
gpr.MapReg(rt, load ? MAP_NOINIT : 0);
ar = gpr.R(rt);
} else {
ar = WZR;
}
switch (o) {
case 35: LDR(INDEX_UNSIGNED, gpr.R(rt), gpr.RPtr(rs), offset); break;
case 37: LDRH(INDEX_UNSIGNED, gpr.R(rt), gpr.RPtr(rs), offset); break;
case 33: LDRSH(INDEX_UNSIGNED, gpr.R(rt), gpr.RPtr(rs), offset); break;
case 36: LDRB(INDEX_UNSIGNED, gpr.R(rt), gpr.RPtr(rs), offset); break;
case 32: LDRSB(INDEX_UNSIGNED, gpr.R(rt), gpr.RPtr(rs), offset); break;
case 35: LDR(INDEX_UNSIGNED, ar, gpr.RPtr(rs), offset); break;
case 37: LDRH(INDEX_UNSIGNED, ar, gpr.RPtr(rs), offset); break;
case 33: LDRSH(INDEX_UNSIGNED, ar, gpr.RPtr(rs), offset); break;
case 36: LDRB(INDEX_UNSIGNED, ar, gpr.RPtr(rs), offset); break;
case 32: LDRSB(INDEX_UNSIGNED, ar, gpr.RPtr(rs), offset); break;
// Store
case 43: STR(INDEX_UNSIGNED, gpr.R(rt), gpr.RPtr(rs), offset); break;
case 41: STRH(INDEX_UNSIGNED, gpr.R(rt), gpr.RPtr(rs), offset); break;
case 40: STRB(INDEX_UNSIGNED, gpr.R(rt), gpr.RPtr(rs), offset); break;
case 43: STR(INDEX_UNSIGNED, ar, gpr.RPtr(rs), offset); break;
case 41: STRH(INDEX_UNSIGNED, ar, gpr.RPtr(rs), offset); break;
case 40: STRB(INDEX_UNSIGNED, ar, gpr.RPtr(rs), offset); break;
}
gpr.ReleaseSpillLocks();
break;