diff --git a/Core/MIPS/ARM/ArmCompLoadStore.cpp b/Core/MIPS/ARM/ArmCompLoadStore.cpp
index 47f7905269..633624f4c4 100644
--- a/Core/MIPS/ARM/ArmCompLoadStore.cpp
+++ b/Core/MIPS/ARM/ArmCompLoadStore.cpp
@@ -338,7 +338,7 @@ namespace MIPSComp
 					addrReg = gpr.R(rs);
 				} else {
 					// In this case, only map rt. rs+offset will be in R0.
-					gpr.MapReg(rt, load ? (MAP_NOINIT | MAP_DIRTY) : 0);
+					gpr.MapReg(rt, load ? MAP_NOINIT : 0);
 					gpr.SetRegImm(R0, addr);
 					addrReg = R0;
 				}
diff --git a/Core/MIPS/ARM/ArmCompVFPU.cpp b/Core/MIPS/ARM/ArmCompVFPU.cpp
index e1099c6795..a05aee73a9 100644
--- a/Core/MIPS/ARM/ArmCompVFPU.cpp
+++ b/Core/MIPS/ARM/ArmCompVFPU.cpp
@@ -1559,7 +1559,7 @@ namespace MIPSComp
 		fpr.MapRegsAndSpillLockV(tregs, sz, 0);
 
 		if (sz == V_Triple) {
-			int temp3 = fpr.GetTempV();
+			MIPSReg temp3 = fpr.GetTempV();
 			fpr.MapRegV(temp3, MAP_DIRTY | MAP_NOINIT);
 			// Cross product vcrsp.t
 
@@ -1575,7 +1575,7 @@ namespace MIPSComp
 			VMUL(fpr.V(temp3), fpr.V(sregs[0]), fpr.V(tregs[1]));
 			VMLS(fpr.V(temp3), fpr.V(sregs[1]), fpr.V(tregs[0]));
 
-			fpr.MapRegsAndSpillLockV(dregs, V_Triple, MAP_DIRTY | MAP_NOINIT);
+			fpr.MapRegsAndSpillLockV(dregs, sz, MAP_NOINIT);
 			VMOV(fpr.V(dregs[0]), S0);
 			VMOV(fpr.V(dregs[1]), S1);
 			VMOV(fpr.V(dregs[2]), fpr.V(temp3));
@@ -1610,7 +1610,7 @@ namespace MIPSComp
 			VMLS(fpr.V(temp4), fpr.V(sregs[2]), fpr.V(tregs[2]));
 			VMLA(fpr.V(temp4), fpr.V(sregs[3]), fpr.V(tregs[3]));
 
-			fpr.MapRegsAndSpillLockV(dregs, sz, MAP_DIRTY | MAP_NOINIT);
+			fpr.MapRegsAndSpillLockV(dregs, sz, MAP_NOINIT);
 			VMOV(fpr.V(dregs[0]), S0);
 			VMOV(fpr.V(dregs[1]), S1);
 			VMOV(fpr.V(dregs[2]), fpr.V(temp3));
diff --git a/Core/MIPS/ARM/ArmJit.h b/Core/MIPS/ARM/ArmJit.h
index 7c84e183f9..9579f49c09 100644
--- a/Core/MIPS/ARM/ArmJit.h
+++ b/Core/MIPS/ARM/ArmJit.h
@@ -274,13 +274,10 @@ private:
 	DestARMReg NEONMapPrefixD(int vfpuReg, VectorSize sz, int mapFlags);
 	void NEONApplyPrefixD(DestARMReg dest);
 
-
 	// NEON utils
 	void NEONMaskToSize(ARMReg vs, VectorSize sz);
 	void NEONTranspose4x4(ARMReg cols[4]);
 
-
-
 	// Utils
 	void SetR0ToEffectiveAddress(MIPSGPReg rs, s16 offset);
 	void SetCCAndR0ForSafeAddress(MIPSGPReg rs, s16 offset, ARMReg tempReg, bool reverse = false);