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ArmEmitter: Merge a fix and some new instructions from Sonic1's emitter.
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3bc05a9941
commit
499dbc05ee
2 changed files with 21 additions and 3 deletions
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@ -607,11 +607,20 @@ void ARMXEmitter::SDIV(ARMReg dest, ARMReg dividend, ARMReg divisor)
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PanicAlert("Trying to use integer divide on hardware that doesn't support it. Bad programmer.");
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WriteSignedMultiply(1, 0xF, 0, dest, divisor, dividend);
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}
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void ARMXEmitter::LSL (ARMReg dest, ARMReg src, Operand2 op2) { WriteShiftedDataOp(0, false, dest, src, op2);}
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void ARMXEmitter::LSLS(ARMReg dest, ARMReg src, Operand2 op2) { WriteShiftedDataOp(0, true, dest, src, op2);}
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void ARMXEmitter::LSL (ARMReg dest, ARMReg src, ARMReg op2) { WriteShiftedDataOp(1, false, dest, src, op2);}
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void ARMXEmitter::LSLS(ARMReg dest, ARMReg src, ARMReg op2) { WriteShiftedDataOp(1, true, dest, src, op2);}
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void ARMXEmitter::LSR (ARMReg dest, ARMReg src, Operand2 op2) { WriteShiftedDataOp(3, false, dest, src, op2);}
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void ARMXEmitter::LSL (ARMReg dest, ARMReg src, ARMReg op2) { WriteShiftedDataOp(1, false, dest, src, op2);}
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void ARMXEmitter::LSLS(ARMReg dest, ARMReg src, ARMReg op2) { WriteShiftedDataOp(1, true, dest, src, op2);}
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void ARMXEmitter::LSR (ARMReg dest, ARMReg src, Operand2 op2) { WriteShiftedDataOp(2, false, dest, src, op2);}
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void ARMXEmitter::LSRS(ARMReg dest, ARMReg src, Operand2 op2) { WriteShiftedDataOp(2, true, dest, src, op2);}
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void ARMXEmitter::LSR (ARMReg dest, ARMReg src, ARMReg op2) { WriteShiftedDataOp(3, false, dest, src, op2);}
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void ARMXEmitter::LSRS(ARMReg dest, ARMReg src, ARMReg op2) { WriteShiftedDataOp(3, true, dest, src, op2);}
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void ARMXEmitter::ASR (ARMReg dest, ARMReg src, Operand2 op2) { WriteShiftedDataOp(4, false, dest, src, op2);}
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void ARMXEmitter::ASRS(ARMReg dest, ARMReg src, Operand2 op2) { WriteShiftedDataOp(4, true, dest, src, op2);}
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void ARMXEmitter::ASR (ARMReg dest, ARMReg src, ARMReg op2) { WriteShiftedDataOp(5, false, dest, src, op2);}
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void ARMXEmitter::ASRS(ARMReg dest, ARMReg src, ARMReg op2) { WriteShiftedDataOp(5, true, dest, src, op2);}
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void ARMXEmitter::MUL (ARMReg dest, ARMReg src, ARMReg op2)
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{
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Write32(condition | (dest << 16) | (src << 8) | (9 << 4) | op2);
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@ -449,11 +449,20 @@ public:
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void ADDS(ARMReg dest, ARMReg src, Operand2 op2);
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void ADC (ARMReg dest, ARMReg src, Operand2 op2);
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void ADCS(ARMReg dest, ARMReg src, Operand2 op2);
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void LSL (ARMReg dest, ARMReg src, Operand2 op2);
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void LSL (ARMReg dest, ARMReg src, ARMReg op2);
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void LSLS(ARMReg dest, ARMReg src, Operand2 op2);
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void LSLS(ARMReg dest, ARMReg src, ARMReg op2);
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void LSR (ARMReg dest, ARMReg src, Operand2 op2);
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void LSRS(ARMReg dest, ARMReg src, Operand2 op2);
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void LSR (ARMReg dest, ARMReg src, ARMReg op2);
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void LSRS(ARMReg dest, ARMReg src, ARMReg op2);
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void ASR (ARMReg dest, ARMReg src, Operand2 op2);
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void ASRS(ARMReg dest, ARMReg src, Operand2 op2);
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void ASR (ARMReg dest, ARMReg src, ARMReg op2);
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void ASRS(ARMReg dest, ARMReg src, ARMReg op2);
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void SBC (ARMReg dest, ARMReg src, Operand2 op2);
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void SBCS(ARMReg dest, ARMReg src, Operand2 op2);
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void RBIT(ARMReg dest, ARMReg src);
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