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Optimize mfv/mtv/mfc1/mtc1 on x86 too

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This commit is contained in:
Henrik Rydgard 2013-11-09 13:56:10 +01:00
parent 04451623b9
commit 316d23d4cc
2 changed files with 12 additions and 21 deletions
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21
Core/MIPS/x86/CompFPU.cpp
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@ -319,28 +319,21 @@ void Jit::Comp_mxc1(MIPSOpcode op)
switch((op >> 21) & 0x1f)
{
case 0: // R(rt) = FI(fs); break; //mfc1
if (rt != MIPS_REG_ZERO)
{
// Cross move! slightly tricky
fpr.StoreFromRegister(fs);
gpr.Lock(rt);
if (rt != MIPS_REG_ZERO) {
fpr.BindToRegister(fs, true, false); // TODO: Seems the V register becomes dirty here? It shouldn't.
gpr.BindToRegister(rt, false, true);
MOV(32, gpr.R(rt), fpr.R(fs));
gpr.UnlockAll();
MOVD_xmm(gpr.R(rt), fpr.RX(fs));
}
return;
break;
case 2: // R(rt) = currentMIPS->ReadFCR(fs); break; //cfc1
Comp_Generic(op);
return;
case 4: //FI(fs) = R(rt); break; //mtc1
// Cross move! slightly tricky
gpr.StoreFromRegister(rt);
fpr.SpillLock(fs);
fpr.BindToRegister(fs, false, true);
MOVSS(fpr.RX(fs), gpr.R(rt));
fpr.ReleaseSpillLocks();
gpr.BindToRegister(rt, true, false);
fpr.BindToRegister(fs, false, true); // TODO: Seems the V register becomes dirty here? It shouldn't.
MOVD_xmm(fpr.RX(fs), gpr.R(rt));
return;
case 6: //currentMIPS->WriteFCR(fs, R(rt)); break; //ctc1

12
Core/MIPS/x86/CompVFPU.cpp
View file

@ -1556,10 +1556,9 @@ void Jit::Comp_Mftv(MIPSOpcode op) {
// rt = 0, imm = 255 appears to be used as a CPU interlock by some games.
if (rt != MIPS_REG_ZERO) {
if (imm < 128) { //R(rt) = VI(imm);
// TODO: Avoid goind through memory
fpr.StoreFromRegisterV(imm);
fpr.MapRegV(imm, 0); // TODO: Seems the V register becomes dirty here? It shouldn't.
gpr.BindToRegister(rt, false, true);
MOV(32, gpr.R(rt), fpr.V(imm));
MOVD_xmm(gpr.R(rt), fpr.VX(imm));
} else if (imm < 128 + VFPU_CTRL_MAX) { //mfvc
// In case we have a saved prefix.
FlushPrefixV();
@ -1573,11 +1572,10 @@ void Jit::Comp_Mftv(MIPSOpcode op) {
break;
case 7: //mtv
if (imm < 128) {
fpr.StoreFromRegisterV(imm);
if (imm < 128) { // VI(imm) = R(rt);
fpr.MapRegV(imm, MAP_DIRTY | MAP_NOINIT); // TODO: Seems the V register becomes dirty here? It shouldn't.
gpr.BindToRegister(rt, true, false);
MOV(32, fpr.V(imm), gpr.R(rt));
// VI(imm) = R(rt);
MOVD_xmm(fpr.VX(imm), gpr.R(rt));
} else if (imm < 128 + VFPU_CTRL_MAX) { //mtvc //currentMIPS->vfpuCtrl[imm - 128] = R(rt);
gpr.BindToRegister(rt, true, false);
MOV(32, M(&currentMIPS->vfpuCtrl[imm - 128]), gpr.R(rt));