From 2e9a9f2d7c6223f9f8a8bdb3305611ac574eb32e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Henrik=20Rydg=C3=A5rd?= Date: Wed, 5 Jul 2017 14:10:36 +0200 Subject: [PATCH] Move mscxr_temp to MIPSState --- Core/MIPS/MIPS.h | 2 +- Core/MIPS/x86/CompFPU.cpp | 8 +++----- Core/MIPS/x86/CompVFPU.cpp | 24 +++++++++++++----------- 3 files changed, 17 insertions(+), 17 deletions(-) diff --git a/Core/MIPS/MIPS.h b/Core/MIPS/MIPS.h index 7c9401ba76..9888e30c43 100644 --- a/Core/MIPS/MIPS.h +++ b/Core/MIPS/MIPS.h @@ -215,7 +215,7 @@ public: bool inDelaySlot; int llBit; // ll/sc u32 temp; // can be used to save temporaries during calculations when we need more than R0 and R1 - + u32 mxcsrTemp; // Temporary used around delay slots and similar. u64 saved_flags; diff --git a/Core/MIPS/x86/CompFPU.cpp b/Core/MIPS/x86/CompFPU.cpp index ba68323b72..fe7c675c96 100644 --- a/Core/MIPS/x86/CompFPU.cpp +++ b/Core/MIPS/x86/CompFPU.cpp @@ -228,8 +228,6 @@ void Jit::Comp_FPUComp(MIPSOpcode op) { } } -static u32 mxcsrTemp; - void Jit::Comp_FPU2op(MIPSOpcode op) { CONDITIONAL_DISABLE; @@ -245,8 +243,8 @@ void Jit::Comp_FPU2op(MIPSOpcode op) { setMXCSR = -1; } if (setMXCSR != -1) { - STMXCSR(M(&mxcsrTemp)); - MOV(32, R(TEMPREG), M(&mxcsrTemp)); + STMXCSR(MIPSSTATE_VAR(mxcsrTemp)); + MOV(32, R(TEMPREG), MIPSSTATE_VAR(mxcsrTemp)); AND(32, R(TEMPREG), Imm32(~(3 << 13))); OR(32, R(TEMPREG), Imm32(setMXCSR << 13)); MOV(32, MIPSSTATE_VAR(temp), R(TEMPREG)); @@ -273,7 +271,7 @@ void Jit::Comp_FPU2op(MIPSOpcode op) { MOVD_xmm(fpr.RX(fd), R(TEMPREG)); if (setMXCSR != -1) { - LDMXCSR(M(&mxcsrTemp)); + LDMXCSR(MIPSSTATE_VAR(mxcsrTemp)); } }; diff --git a/Core/MIPS/x86/CompVFPU.cpp b/Core/MIPS/x86/CompVFPU.cpp index b48ddde7e3..2ba9c3e4b1 100644 --- a/Core/MIPS/x86/CompVFPU.cpp +++ b/Core/MIPS/x86/CompVFPU.cpp @@ -1072,13 +1072,15 @@ void Jit::Comp_VecDo3(MIPSOpcode op) { CMPPS(XMM1, fpr.VS(tregs), CMP_NLT); ANDPS(XMM1, R(XMM0)); - ANDPS(XMM1, M(&oneOneOneOne)); + MOV(PTRBITS, R(TEMPREG), ImmPtr(&oneOneOneOne)); + ANDPS(XMM1, MatR(TEMPREG)); MOVAPS(fpr.VSX(dregs), R(XMM1)); break; case 7: // vslt MOVAPS(XMM1, fpr.VS(sregs)); CMPPS(XMM1, fpr.VS(tregs), CMP_LT); - ANDPS(XMM1, M(&oneOneOneOne)); + MOV(PTRBITS, R(TEMPREG), ImmPtr(&oneOneOneOne)); + ANDPS(XMM1, MatR(TEMPREG)); MOVAPS(fpr.VSX(dregs), R(XMM1)); break; } @@ -1209,11 +1211,13 @@ void Jit::Comp_VecDo3(MIPSOpcode op) { CMPORDSS(XMM1, R(XMM0)); CMPNLTSS(tempxregs[i], R(XMM0)); ANDPS(tempxregs[i], R(XMM1)); - ANDPS(tempxregs[i], M(&oneOneOneOne)); + MOV(PTRBITS, R(TEMPREG), ImmPtr(&oneOneOneOne)); + ANDPS(tempxregs[i], MatR(TEMPREG)); break; case 7: // vslt CMPLTSS(tempxregs[i], fpr.V(tregs[i])); - ANDPS(tempxregs[i], M(&oneOneOneOne)); + MOV(PTRBITS, R(TEMPREG), ImmPtr(&oneOneOneOne)); + ANDPS(tempxregs[i], MatR(TEMPREG)); break; } break; @@ -1766,10 +1770,8 @@ extern const double mulTableVf2i[32] = { static const float half = 0.5f; -static double maxIntAsDouble = (double)0x7fffffff; // that's not equal to 0x80000000 -static double minIntAsDouble = (double)(int)0x80000000; - -static u32 mxcsrTemp; +static const double maxIntAsDouble = (double)0x7fffffff; // that's not equal to 0x80000000 +static const double minIntAsDouble = (double)(int)0x80000000; void Jit::Comp_Vf2i(MIPSOpcode op) { CONDITIONAL_DISABLE; @@ -1804,8 +1806,8 @@ void Jit::Comp_Vf2i(MIPSOpcode op) { } // Except for truncate, we need to update MXCSR to our preferred rounding mode. if (setMXCSR != -1) { - STMXCSR(M(&mxcsrTemp)); - MOV(32, R(TEMPREG), M(&mxcsrTemp)); + STMXCSR(MIPSSTATE_VAR(mxcsrTemp)); + MOV(32, R(TEMPREG), MIPSSTATE_VAR(mxcsrTemp)); AND(32, R(TEMPREG), Imm32(~(3 << 13))); if (setMXCSR != 0) { OR(32, R(TEMPREG), Imm32(setMXCSR << 13)); @@ -1866,7 +1868,7 @@ void Jit::Comp_Vf2i(MIPSOpcode op) { } if (setMXCSR != -1) { - LDMXCSR(M(&mxcsrTemp)); + LDMXCSR(MIPSSTATE_VAR(mxcsrTemp)); } ApplyPrefixD(dregs, sz);