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[Jit] add more instruction
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2 changed files with 46 additions and 0 deletions
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@ -44,6 +44,13 @@
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X_FORM(OPCD, crbD, crbA, crbB, XO, LK); \
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}
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// 0 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
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// | OPCD | S | A | SH | MB | ME |Rc|
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#define M_FORM(OPCD, RS, RA, SH, MB, ME, Rc) { \
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int rs = (RS), ra = (RA), sh = (SH); \
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Write32((OPCD << 26) | (rs << 21) | (ra << 16) | (sh << 11) | ((MB) << 6) | ((ME) << 1) | (Rc)); \
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}
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namespace PpcGen {
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// Mul stuff
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@ -508,6 +515,10 @@ namespace PpcGen {
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Write32(0x7C000734 | (src << 21) | (dest << 16));
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}
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void PPCXEmitter::EXTSW (PPCReg Rt, PPCReg Ra) {
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X_FORM(31, Rt, Ra, 0, 986, 0);
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}
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void PPCXEmitter::EQV (PPCReg Ra, PPCReg Rs, PPCReg Rb) {
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X_FORM(31, Rs, Ra, Rb, 284, 0);
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}
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@ -516,6 +527,10 @@ namespace PpcGen {
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Write32((21<<26) | (src << 21) | (dest << 16) | (shift << 11) | (start << 6) | (end << 1));
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}
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void PPCXEmitter::RLDICL (PPCReg Rs, PPCReg Ra, int sh, int mb) {
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Write32((30 << 26) | (Rs << 21) | (Ra << 16) | (sh << 11) | ((mb) << 6) | ((sh) << 1) | (0));
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}
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// Shift Instructions
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void PPCXEmitter::SRAW (PPCReg dest, PPCReg src, PPCReg shift) {
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X_FORM(31, src, dest, shift, 792, 0);
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@ -622,6 +637,24 @@ namespace PpcGen {
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// Load the final value
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LFS(FRt, R7, 0);
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}
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void PPCXEmitter::MTFSB0(int bt) {
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X_FORM(63, bt, 0, 0, 70, 0);
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}
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void PPCXEmitter::FCTID (PPCReg FRt, PPCReg FRb) {
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X_FORM(63, FRt, 0, FRb, 846, 0);
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}
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void PPCXEmitter::FCFID (PPCReg FRt, PPCReg FRb) {
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X_FORM(63, FRt, 0, FRb, 846, 0);
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}
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void PPCXEmitter::FRSP (PPCReg FRt, PPCReg FRb) {
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X_FORM(63, FRt, 0, FRb, 12, 0);
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}
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void PPCXEmitter::FCTIW (PPCReg FRt, PPCReg FRb) {
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X_FORM(63, FRt, 0, FRb, 14, 0);
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}
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void PPCXEmitter::STFIWX(PPCReg FRt, PPCReg FRa, PPCReg FRb) {
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X_FORM(31, FRt, FRa, FRb, 983, 0);
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}
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// Fpu move instruction
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void PPCXEmitter::FMR (PPCReg FRt, PPCReg FRb) {
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@ -293,10 +293,13 @@ namespace PpcGen
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// sign
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void EXTSB (PPCReg dest, PPCReg src);
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void EXTSH (PPCReg dest, PPCReg src);
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void EXTSW (PPCReg dest, PPCReg src);
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//
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void RLWINM (PPCReg dest, PPCReg src, int shift, int start, int end);
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void RLDICL (PPCReg Rt, PPCReg Rs, int sh, int mb);
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// Shift Instructions
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void SRAW (PPCReg dest, PPCReg src, PPCReg shift);
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void SRAWI (PPCReg dest, PPCReg src, unsigned short imm);
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@ -359,6 +362,16 @@ namespace PpcGen
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// Fpu move instruction
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void FMR (PPCReg FRt, PPCReg FRb);
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// fpu
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void MTFSB0 (int bt);
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void FCFID (PPCReg FRt, PPCReg FRb);
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void FCTID (PPCReg FRt, PPCReg FRb);
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void FRSP (PPCReg FRt, PPCReg FRb);
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void FCTIW (PPCReg FRt, PPCReg FRb);
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void STFIWX (PPCReg FRt, PPCReg FRa, PPCReg FRb);
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// Fpu
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void FNEG (PPCReg FRt, PPCReg FRb);
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void FABS (PPCReg FRt, PPCReg FRb);
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void FNABS (PPCReg FRt, PPCReg FRb);
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