From 0bd382c51803a18a98cad5c2e3947255d1647c07 Mon Sep 17 00:00:00 2001
From: "Unknown W. Brackets" <checkins@unknownbrackets.org>
Date: Sat, 16 Feb 2013 10:18:13 -0800
Subject: [PATCH] Discard temp regs right away, some helper funcs.

---
 Core/MIPS/x86/RegCacheFPU.cpp | 18 +++++++-----------
 Core/MIPS/x86/RegCacheFPU.h   | 10 ++++++++--
 2 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/Core/MIPS/x86/RegCacheFPU.cpp b/Core/MIPS/x86/RegCacheFPU.cpp
index f2356a6d57..fa637f7fb5 100644
--- a/Core/MIPS/x86/RegCacheFPU.cpp
+++ b/Core/MIPS/x86/RegCacheFPU.cpp
@@ -82,6 +82,8 @@ void FPURegCache::MapRegsV(const u8 *v, VectorSize sz, int flags) {
 void FPURegCache::ReleaseSpillLocks() {
 	for (int i = 0; i < NUM_MIPS_FPRS; i++)
 		regs[i].locked = false;
+	for (int i = TEMP0; i < TEMP0 + NUM_TEMPS; ++i)
+		DiscardR(i);
 }
 
 void FPURegCache::BindToRegister(const int i, bool doLoad, bool makeDirty) {
@@ -126,8 +128,7 @@ void FPURegCache::StoreFromRegister(int i) {
 	}
 }
 
-void FPURegCache::DiscardR(int i)
-{
+void FPURegCache::DiscardR(int i) {
 	_assert_msg_(DYNA_REC, !regs[i].location.IsImm(), "FPU can't handle imm yet.");
 	if (regs[i].away) {
 		X64Reg xr = regs[i].location.GetSimpleReg();
@@ -142,6 +143,10 @@ void FPURegCache::DiscardR(int i)
 	}
 }
 
+bool FPURegCache::IsTemp(X64Reg xr) {
+	return xregs[xr].mipsReg >= TEMP0;
+}
+
 void FPURegCache::Flush() {
 	for (int i = 0; i < TEMP0; i++) {
 		if (regs[i].locked) {
@@ -210,15 +215,6 @@ X64Reg FPURegCache::GetFreeXReg() {
 	}
 	//Okay, not found :( Force grab one
 
-	// Maybe a temp reg?
-	for (int i = TEMP0; i < NUM_MIPS_FPRS; ++i) {
-		if (regs[i].away && !regs[i].locked) {
-			X64Reg xr = regs[i].location.GetSimpleReg();
-			DiscardR(i);
-			return xr;
-		}
-	}
-
 	//TODO - add a pass to grab xregs whose mipsreg is not used in the next 3 instructions
 	for (int i = 0; i < aCount; i++) {
 		X64Reg xr = (X64Reg)aOrder[i];
diff --git a/Core/MIPS/x86/RegCacheFPU.h b/Core/MIPS/x86/RegCacheFPU.h
index 804d367ab0..429c25b148 100644
--- a/Core/MIPS/x86/RegCacheFPU.h
+++ b/Core/MIPS/x86/RegCacheFPU.h
@@ -26,7 +26,8 @@ using namespace Gen;
 
 
 // GPRs are numbered 0 to 31
-// VFPU regs are numbered 32 to 160.
+// VFPU regs are numbered 32 to 159.
+// Then we have some temp regs for VFPU handling from 160 to 167.
 
 enum {
 	NUM_TEMPS = 4,
@@ -34,6 +35,7 @@ enum {
 	TEMP1 = TEMP0 + 1,
 	TEMP2 = TEMP0 + 2,
 	TEMP3 = TEMP0 + 3,
+	TEMP4 = TEMP0 + 4,
 	NUM_MIPS_FPRS = 32 + 128 + NUM_TEMPS,
 };
 
@@ -75,7 +77,11 @@ public:
 		StoreFromRegister(preg + 32);
 	}
 	OpArg GetDefaultLocation(int reg) const;
-	void DiscardR(int preg);
+	void DiscardR(int freg);
+	void DiscardV(int vreg) {
+		DiscardR(vreg + 32);
+	}
+	bool IsTemp(X64Reg xreg);
 
 	void SetEmitter(XEmitter *emitter) {emit = emitter;}