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More IR interpreter tweaks

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Henrik Rydgård 2024-05-10 18:41:55 +02:00
parent 91d9ef9b81
commit 092179c42d
2 changed files with 8 additions and 19 deletions
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24
Core/MIPS/IR/IRInterpreter.cpp
View file

@ -283,33 +283,20 @@ u32 IRInterpret(MIPSState *mips, const IRInst *inst, int count) {
case IROp::LoadVec4:
{
u32 base = mips->r[inst->src1] + inst->constant;
#if defined(_M_SSE)
_mm_store_ps(&mips->f[inst->dest], _mm_load_ps((const float *)Memory::GetPointerUnchecked(base)));
#else
for (int i = 0; i < 4; i++)
mips->f[inst->dest + i] = Memory::ReadUnchecked_Float(base + 4 * i);
#endif
// This compiles to a nice SSE load/store on x86, and hopefully similar on ARM.
memcpy(&mips->f[inst->dest], Memory::GetPointerUnchecked(base), 4 * 4);
break;
}
case IROp::StoreVec4:
{
u32 base = mips->r[inst->src1] + inst->constant;
#if defined(_M_SSE)
_mm_store_ps((float *)Memory::GetPointerUnchecked(base), _mm_load_ps(&mips->f[inst->dest]));
#else
for (int i = 0; i < 4; i++)
Memory::WriteUnchecked_Float(mips->f[inst->dest + i], base + 4 * i);
#endif
memcpy((float *)Memory::GetPointerUnchecked(base), &mips->f[inst->dest], 4 * 4);
break;
}
case IROp::Vec4Init:
{
#if defined(_M_SSE)
_mm_store_ps(&mips->f[inst->dest], _mm_load_ps(vec4InitValues[inst->src1]));
#else
memcpy(&mips->f[inst->dest], vec4InitValues[inst->src1], 4 * sizeof(float));
#endif
break;
}
@ -398,8 +385,9 @@ u32 IRInterpret(MIPSState *mips, const IRInst *inst, int count) {
#if defined(_M_SSE)
_mm_store_ps(&mips->f[inst->dest], _mm_mul_ps(_mm_load_ps(&mips->f[inst->src1]), _mm_set1_ps(mips->f[inst->src2])));
#else
const float factor = mips->f[inst->src2];
for (int i = 0; i < 4; i++)
mips->f[inst->dest + i] = mips->f[inst->src1 + i] * mips->f[inst->src2];
mips->f[inst->dest + i] = mips->f[inst->src1 + i] * factor;
#endif
break;
}
@ -792,7 +780,7 @@ u32 IRInterpret(MIPSState *mips, const IRInst *inst, int count) {
mips->f[inst->dest] = mips->f[inst->src1] - mips->f[inst->src2];
break;
case IROp::FMul:
if ((my_isinf(mips->f[inst->src1]) && mips->f[inst->src2] == 0.0f) || (my_isinf(mips->f[inst->src2]) && mips->f[inst->src1] == 0.0f)) {
if ((mips->f[inst->src2] == 0.0f && my_isinf(mips->f[inst->src1])) || (mips->f[inst->src1] == 0.0f && my_isinf(mips->f[inst->src2]))) {
mips->fi[inst->dest] = 0x7fc00000;
} else {
mips->f[inst->dest] = mips->f[inst->src1] * mips->f[inst->src2];

3
Core/MIPS/MIPSIntVFPU.cpp
View file

@ -621,8 +621,9 @@ namespace MIPSInt
break;
default:
ApplySwizzleS(s, sz);
break;
}
for (int i = 0; i < n; i++) {
for (int i = 0; i < (int)n; i++) {
switch (optype) {
case 0: d[i] = s[i]; break; //vmov
case 1: d[i] = s[i]; break; //vabs (prefix)