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74 lines
1.7 KiB
Text
74 lines
1.7 KiB
Text
; Tests timing of VBL being set, and special case where reading VBL flag
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; as it would be set causes it to not be set for that frame.
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.include "prefix_ppu.a"
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test_name:
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.db "VBL TIMING",0
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test_too_soon:
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jsr delay_20
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lda $2002
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and #$80
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jsr error_if_ne
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lda $2002
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and #$80
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jsr error_if_eq
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rts
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test_too_late:
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jsr delay_21
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lda $2002
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and #$80
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jsr error_if_eq
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lda $2002
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and #$80
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jsr error_if_ne
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rts
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.code
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reset:
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jsr begin_ppu_test
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lda #2;) Flag should read as clear 3 PPU clocks before VBL
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sta <result
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jsr sync_ppu_align0_30
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jsr test_too_soon
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lda #3;) Flag should read as set 0 PPU clocks after VBL
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sta <result
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jsr sync_ppu_align0_30
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jsr test_too_late
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lda #4;) Flag should read as clear 2 PPU clocks before VBL
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sta <result
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jsr sync_ppu_align2_30
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jsr test_too_soon
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lda #5;) Flag should read as set 1 PPU clock after VBL
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sta <result
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jsr sync_ppu_align2_30
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jsr test_too_late
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lda #6;) Flag should read as clear 1 PPU clock before VBL
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sta <result
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jsr sync_ppu_align1_31
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jsr test_too_soon
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lda #7;) Flag should read as set 2 PPU clocks after VBL
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sta <result
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jsr sync_ppu_align1_30
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jsr test_too_late
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lda #8;) Reading 1 PPU clock before VBL should suppress setting
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sta <result
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jsr sync_ppu_align1_30
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jsr delay_26
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lda $2002
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and #$80
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jsr error_if_ne
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lda $2002
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and #$80
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jsr error_if_ne
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jmp tests_passed
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