mirror of
https://github.com/PCSX2/pcsx2.git
synced 2025-04-02 10:52:54 -04:00
638e0b30f6
git-svn-id: http://pcsx2.googlecode.com/svn/branches/pcsx2_0.9.1@159 96395faa-99c1-11dd-bbfe-3dabce05a288
314 lines
7 KiB
C
314 lines
7 KiB
C
/* Pcsx2 - Pc Ps2 Emulator
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* Copyright (C) 2002-2003 Pcsx2 Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <assert.h>
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#include "Common.h"
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#include "InterTables.h"
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#include "ix86/ix86.h"
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#include "iR5900.h"
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#ifdef __WIN32__
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#pragma warning(disable:4244)
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#pragma warning(disable:4761)
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#endif
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/*********************************************************
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* Arithmetic with immediate operand *
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* Format: OP rt, rs, immediate *
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*********************************************************/
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#ifndef ARITHMETICIMM_RECOMPILE
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REC_FUNC(ADDI);
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REC_FUNC(ADDIU);
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REC_FUNC(DADDI);
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REC_FUNC(DADDIU);
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REC_FUNC(ANDI);
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REC_FUNC(ORI);
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REC_FUNC(XORI);
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REC_FUNC(SLTI);
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REC_FUNC(SLTIU);
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#else
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////////////////////////////////////////////////////
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void recADDI( void ) {
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int rsreg;
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int rtreg;
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if (!_Rt_) return;
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#ifdef ENABLE_REGCACHING
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if (_Rt_ == _Rs_) {
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rtreg = _allocGPRtoX86reg(-1, _Rt_, MODE_WRITE | MODE_READ);
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ADD64ItoR(rtreg, _Imm_);
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} else
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if (_Rs_ == 0) {
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rtreg = _allocGPRtoX86reg(-1, _Rt_, MODE_WRITE);
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MOV64ItoR(rtreg, _Imm_);
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} else {
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_addNeededGPRtoX86reg(_Rs_); _addNeededGPRtoX86reg(_Rt_);
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rsreg = _allocGPRtoX86reg(-1, _Rs_, MODE_READ);
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rtreg = _allocGPRtoX86reg(-1, _Rt_, MODE_WRITE);
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if (_Imm_ == 0) {
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MOV64RtoR(rtreg, rsreg);
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} else {
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MOV32ItoR(rtreg, _Imm_);
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ADD32RtoR(rtreg, rsreg);
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SHL64ItoR(rtreg, 32);
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SAR64ItoR(rtreg, 32);
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}
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}
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_clearNeededX86regs();
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#else
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MOV32MtoR( EAX, (u32)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
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if (_Imm_ != 0) {
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ADD32ItoR( EAX, _Imm_ );
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}
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CDQ( );
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MOV32RtoM( (u32)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX );
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MOV32RtoM( (u32)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], EDX );
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#endif
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}
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////////////////////////////////////////////////////
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void recADDIU( void )
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{
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recADDI( );
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}
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////////////////////////////////////////////////////
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void recDADDI( void ) {
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int rsreg;
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int rtreg;
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if (!_Rt_) return;
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#ifdef ENABLE_REGCACHING
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if (_Rt_ == _Rs_) {
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rtreg = _allocGPRtoX86reg(-1, _Rt_, MODE_WRITE | MODE_READ);
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ADD64ItoR(rtreg, _Imm_);
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} else {
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_addNeededGPRtoX86reg(_Rs_); _addNeededGPRtoX86reg(_Rt_);
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rsreg = _allocGPRtoX86reg(-1, _Rs_, MODE_READ);
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rtreg = _allocGPRtoX86reg(-1, _Rt_, MODE_WRITE);
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if (_Imm_ == 0) {
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MOV64RtoR(rtreg, rsreg);
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} else {
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MOV64ItoR(rtreg, _Imm_);
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ADD64RtoR(rtreg, rsreg);
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}
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}
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_clearNeededX86regs();
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#else
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MOV64MtoR( RAX, (u32)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
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if ( _Imm_ != 0 )
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{
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ADD64ItoR( EAX, _Imm_ );
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}
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MOV64RtoM( (u32)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], RAX );
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#endif
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}
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////////////////////////////////////////////////////
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void recDADDIU( void )
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{
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recDADDI( );
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}
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////////////////////////////////////////////////////
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void recSLTIU( void )
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{
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if ( ! _Rt_ )
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{
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return;
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}
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#ifdef ENABLE_REGCACHING
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_freeX86regs();
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#endif
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MOV64MtoR(RAX, (u32)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
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CMP64ItoR(RAX, _Imm_);
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SETB8R (EAX);
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AND64ItoR(EAX, 0xff);
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MOV64RtoM((u32)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX);
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}
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////////////////////////////////////////////////////
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void recSLTI( void )
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{
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if ( ! _Rt_ )
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{
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return;
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}
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#ifdef ENABLE_REGCACHING
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_freeX86regs();
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#endif
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MOV64MtoR(RAX, (u32)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
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CMP64ItoR(RAX, _Imm_);
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SETL8R (EAX);
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AND64ItoR(EAX, 0xff);
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MOV64RtoM((u32)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX);
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}
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////////////////////////////////////////////////////
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void recANDI( void ) {
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int rsreg;
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int rtreg;
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if (!_Rt_) return;
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#ifdef ENABLE_REGCACHING
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if (_Rt_ == _Rs_) {
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rtreg = _allocGPRtoX86reg(-1, _Rt_, MODE_WRITE | MODE_READ);
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AND64ItoR(rtreg, _ImmU_);
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} else {
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_addNeededGPRtoX86reg(_Rs_); _addNeededGPRtoX86reg(_Rt_);
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rsreg = _allocGPRtoX86reg(-1, _Rs_, MODE_READ);
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rtreg = _allocGPRtoX86reg(-1, _Rt_, MODE_WRITE);
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if (_Imm_ == 0) {
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MOV64RtoR(rtreg, rsreg);
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} else {
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MOV64RtoR(rtreg, rsreg);
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AND64ItoR(rtreg, _ImmU_);
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}
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}
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_clearNeededX86regs();
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#else
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if ( _ImmU_ != 0 ) {
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if (_Rs_ == _Rt_) {
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MOV32ItoM( (u32)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 );
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AND32ItoM( (u32)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], _ImmU_ );
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} else {
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MOV32MtoR( EAX, (u32)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] );
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AND32ItoR( EAX, _ImmU_ );
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MOV32ItoM( (u32)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 );
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MOV32RtoM( (u32)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX );
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}
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}
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else
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{
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MOV32ItoM( (u32)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 );
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MOV32ItoM( (u32)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], 0 );
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}
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#endif
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}
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////////////////////////////////////////////////////
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void recORI( void ) {
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int rsreg;
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int rtreg;
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if (!_Rt_) return;
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#ifdef ENABLE_REGCACHING
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if (_Rt_ == _Rs_) {
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rtreg = _allocGPRtoX86reg(-1, _Rt_, MODE_WRITE | MODE_READ);
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OR64ItoR(rtreg, _ImmU_);
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} else
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if (_Rs_ == 0) {
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rtreg = _allocGPRtoX86reg(-1, _Rt_, MODE_WRITE);
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MOV64ItoR(rtreg, _ImmU_);
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} else {
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_addNeededGPRtoX86reg(_Rs_); _addNeededGPRtoX86reg(_Rt_);
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rsreg = _allocGPRtoX86reg(-1, _Rs_, MODE_READ);
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rtreg = _allocGPRtoX86reg(-1, _Rt_, MODE_WRITE);
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if (_Imm_ == 0) {
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MOV64RtoR(rtreg, rsreg);
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} else {
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MOV64RtoR(rtreg, rsreg);
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OR64ItoR(rtreg, _ImmU_);
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}
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}
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_clearNeededX86regs();
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#else
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if (_Rs_ == _Rt_) {
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OR32ItoM( (u32)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ], _ImmU_ );
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} else {
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MOV64MtoR( RAX, (u32)&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ] );
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if ( _ImmU_ != 0 )
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{
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OR64ItoR( RAX, _ImmU_ );
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}
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MOV64RtoM( (u32)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ], RAX );
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}
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#endif
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}
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////////////////////////////////////////////////////
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void recXORI( void ) {
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int rsreg;
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int rtreg;
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if (!_Rt_) return;
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#ifdef ENABLE_REGCACHING
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if (_Rt_ == _Rs_) {
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rtreg = _allocGPRtoX86reg(-1, _Rt_, MODE_WRITE | MODE_READ);
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XOR64ItoR(rtreg, _ImmU_);
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} else {
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_addNeededGPRtoX86reg(_Rs_); _addNeededGPRtoX86reg(_Rt_);
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rsreg = _allocGPRtoX86reg(-1, _Rs_, MODE_READ);
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rtreg = _allocGPRtoX86reg(-1, _Rt_, MODE_WRITE);
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MOV64RtoR(rtreg, rsreg);
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XOR64ItoR(rtreg, _ImmU_);
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}
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_clearNeededX86regs();
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#else
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MOV64MtoR( RAX, (u32)&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ] );
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XOR64ItoR( RAX, _ImmU_ );
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MOV64RtoM( (u32)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ], RAX );
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#endif
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}
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#endif
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