A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 3v3 8v BCLK LRCLK SDIN !RESET !IN10 !IN2 !CS5 !CS2 !CS0 !WR !RD !WR2 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 DREQ DACK SBEN PIO Breakout Board Nicolas "Pixel" Noble https://github.com/grumpycoders/pcsx-redux PSX BOARD A1 A3 A5 A7 A9 A11 A13 A15 A17 A19 A21 A23 D1 D3 D5 D7 D9 D11 D13 D15 CLK 3v3 8v BCLK LRCLK SDIN !RESET !IN10 !IN2 !CS5 !CS2 !CS0 !WR !RD !WR2 DREQ DACK SBEN A0 A2 A4 A6 A8 A10 A12 A14 A16 A18 A20 A22 D0 D2 D4 D6 D8 D10 D12 D14 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 <b>TE CONNECTIVITY / AMP - BUCHSE, SCSI, VERTIKAL, 68 </b><p> Source: <a href="http://www.tycoelectronics.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=5749069&DocType=Customer+Drawing&DocLang=English"> Data sheet </a> >NAME >VALUE >NAME >VALUE <b>TE CONNECTIVITY / AMP - BUCHSE, SCSI, VERTIKAL, 68 </b><p> Source: <a href="http://www.tycoelectronics.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=5749069&DocType=Customer+Drawing&DocLang=English"> Data sheet </a> <b>Pin Header Connectors</b><p> <author>Created by librarian@cadsoft.de</author> <b>PIN HEADER</b> >NAME >VALUE <b>PIN HEADER</b> >NAME >VALUE PIN HEADER PIN HEADER <b>EAGLE Design Rules</b> <p> Die Standard-Design-Rules sind so gewählt, dass sie für die meisten Anwendungen passen. Sollte ihre Platine besondere Anforderungen haben, treffen Sie die erforderlichen Einstellungen hier und speichern die Design Rules unter einem neuen Namen ab. <b>EAGLE Design Rules</b> <p> The default Design Rules have been set to cover a wide range of applications. Your particular design may have different requirements, so please make the necessary adjustments and save your customized design rules under a new name. Since Version 8.2, EAGLE supports online libraries. The ids of those online libraries will not be understood (or retained) with this version. Since Version 8.3, EAGLE supports URNs for individual library assets (packages, symbols, and devices). The URNs of those assets will not be understood (or retained) with this version. Since Version 8.3, EAGLE supports the association of 3D packages with devices in libraries, schematics, and board files. Those 3D packages will not be understood (or retained) with this version.