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21 commits

Author SHA1 Message Date
hch12907
3b6cc1f701 VPU: Split VPU0/1 into two threads 
- VU and VIF are no longer on separate threads
- Instead, they are now on the same "VPU" thread
- VPU is the one which is threaded now - VPU0/1 run on separate threads

This is done to (hopefully!) improve synchronization
 2019-01-26 00:43:21 +08:00
hch12907
e1550da391 VIF: Split CVif into several files 
- MP is for microprogram-related instructions
- SET is for register-setting-related instructions
- TRANSFER and UNPACK are... well, for Transfer and unpack-related instructions
 2018-11-04 17:13:40 +08:00
hch12907
62bb9925ab Merge marco9999/gif-impl. 2018-10-12 18:44:34 +08:00
hch12907
52e6bf9d99 Implement data hazard, register writing priority, proper CPI for VU interpreter 
- implemented data hazard
- implemented register writing priority
- proper CPI
- note: WAITP and WAITQ is handled as a data hazard (special case)
 2018-10-10 22:36:42 +08:00
hch12907
56b5e45d84 Implement VU pipelines 
note: this commit can be reverted if pipeline emulation is found to be unneccessary
- added MipsPipeline
- implemented VU pipelines for the interpreter
 2018-10-10 22:35:14 +08:00
hch12907
1d1212e57e Implement VU interpreter 2018-09-24 00:43:06 +08:00
Marco Satti
30ad98be49 Merge branch 'master' into gif-impl 2018-09-08 14:51:34 +08:00
hch12907
2e9293c49e Add VU instruction lookup table 
- also improved log message for IOP/EE Core instruction lookup
 2018-09-02 22:20:44 +08:00
hch12907
f4abbb78f9 Add branch delay slots to VUs and squash some bugs 
- added branch delay slots to the VUs (todo: different ANDs for VU0 and VU1, VU0 has smaller micromem)
- fixed imm15 (forgot to lshift DEST by 11 bits)
- removed various warnings (heck, even fixed one bug!)
- extended the visibility of the members in BranchDelaySlot to protected
- [experimental] branching in branch delay slots
 2018-09-01 18:49:51 +08:00
Marco Satti
0bfb350a34 Add in GIF registers 2018-08-19 21:56:07 +08:00
Marco Satti
3e87790f06 Added Giftag structure. 2018-08-19 16:50:22 +08:00
Marco Satti
dd8445a2b9 Testing a serialization solution, useful for debugging state. 2018-08-05 23:46:55 +08:00
Marco Satti
52a1691893 Merge branch 'master' into sio2-sio0-impl 2018-07-24 22:08:53 +08:00
hch12907
d28f6d8ffd Detail the IPU_CMD register. 2018-07-12 21:04:15 +08:00
Marco Satti
8c8dfdf98c Fix build. 2018-05-06 22:12:59 +08:00
Marco Satti
6d4111207d Merge branch 'master' into sio1-sio0-impl 2018-05-06 21:42:59 +08:00
Marco Satti
ab910c6de2 Improve address caching a little, fix up all warnings under MSVC. 2018-05-05 18:10:15 +08:00
Marco Satti
ba73a24a8a More speedups... 2018-04-28 19:14:47 +08:00
Marco Satti
c7e37542a2 Further optimisations - found some places where GCC correctly optimises but MSVC and Clang do not... 2018-04-28 10:57:39 +08:00
Marco Satti
ca956dc9ce libliborbum -> liborbum 2018-04-24 21:04:02 +08:00
Marco Satti
dd133df21a Remove boost-cmake submodule, use system boost through FindBoost cmake module. 2018-04-23 21:27:55 +08:00