59 commits

Author	SHA1	Message	Date
GliGli	0ef5d01b2c	update for GCC 9.2 toolchain	2022-02-11 13:27:24 +01:00
GliGli	b1f4df3009	much better Z buffer handling / other fixes	2012-09-10 20:47:34 +02:00
GliGli	fea1bcea30	improved dynarec <-> interpreter T flag passing / cleanups	2012-09-08 19:32:38 +02:00
GliGli	62d03c2a9c	emitter opti epic fail, corrupted memory, wasted a PPC reg and wasn't any usefull / using that reg for SH4 PR, actually much faster, and safer :)	2012-09-08 18:36:50 +02:00
GliGli	7290d206d5	recompiled fsrra opti	2012-09-05 20:31:37 +02:00
GliGli	31137c4180	cleanup / forgot to reactivate an opti	2012-09-05 19:46:31 +02:00
GliGli	0deaa0899c	using altivec for SH4 matrix ops / various cleanups / threaded pvr refinements	2012-09-04 20:12:55 +02:00
GliGli	501c222883	new dynarec SQ writes handling method / various cleanups	2012-09-01 22:56:59 +02:00
GliGli	c5a32c02b1	dynarec bugfix + misc changes	2012-08-31 21:22:45 +02:00
GliGli	4d790ca157	dynarec bugfixes & improvements (fixes Zombie Revenge, proper fix for DOA2 too)	2012-08-25 15:02:04 +02:00
GliGli	e92ff330aa	recompiled divs	2012-08-25 11:07:45 +02:00
GliGli	0bf812c586	various fixes, DOA2 mostly working	2012-08-18 23:14:16 +02:00
GliGli	4e8e313c90	wip	2012-05-19 12:03:30 +02:00
GliGli	ab83a08f91	floating point reg allocator opti	2012-02-25 23:21:09 +01:00
GliGli	51a5ddb345	tiny emitter opti	2012-02-25 01:05:30 +01:00
GliGli	e0deeb51fa	branchless dynarec mem accesses wip	2012-02-24 23:59:26 +01:00
GliGli	3eb4f3841a	ifb bugfix	2012-02-24 20:36:12 +01:00
GliGli	2ef993df94	safer roml / new moderately safe opti	2012-02-22 22:35:02 +01:00
GliGli	f978fa4856	various optis, maybe unsafe	2012-02-22 20:10:06 +01:00
GliGli	d4296bd3bd	opti: removing LoadTs + direct pvr call in UpdateSystem	2012-02-21 19:11:57 +01:00
GliGli	751a03257f	fully working shil ce optimiser	2011-12-05 22:56:08 +01:00
GliGli	df4c919502	wip (one new recompiled op + shil ifb opti)	2011-12-04 18:16:00 +01:00
GliGli	a181694f25	little bugfix	2011-11-28 01:16:55 +01:00
GliGli	8d08f766c9	threaded pvr + pref opti	2011-11-26 19:37:55 +01:00
GliGli	d139e0f3f4	opti: generate fpu ftrv code, faster than altivec function call	2011-11-25 23:39:32 +01:00
GliGli	dab0609c1e	another readm / writem opti	2011-11-25 22:17:51 +01:00
GliGli	81e523db81	opti: removing 1 op for each readm / writem	2011-11-25 20:58:55 +01:00
GliGli	9c7f60c509	dynarec reads/writes/float movs optis	2011-11-25 01:23:26 +01:00
GliGli	1e65abbb64	major opti: using a dedicated ppc register for sh4 pc	2011-11-24 01:22:11 +01:00
GliGli	1068b5b4e3	jumps/branches opti + fsrra opti	2011-11-23 19:58:16 +01:00
GliGli	5fb759b8a9	fix mulls from unallocated reg	2011-11-20 20:43:24 +01:00
GliGli	567c2abe10	all shil ops except div are recompiled	2011-11-20 17:45:33 +01:00
GliGli	439aee1451	2 more recompiled ops	2011-11-19 21:48:02 +01:00
GliGli	10b7941e9f	recompiled integer mulls & swaps	2011-11-19 19:24:17 +01:00
GliGli	d2f2ca63af	dynarec bugfix for bios	2011-11-19 17:06:27 +01:00
GliGli	f12ed12919	working dynarec SQ write opti	2011-11-19 16:21:48 +01:00
GliGli	0b07114803	bugfix, soucalibur is working on dynarec :)	2011-11-19 11:54:30 +01:00
GliGli	98d834d687	dynarec bugfixes	2011-11-19 00:28:07 +01:00
GliGli	bb7eb6d2c6	bugfixes & more recompiled ops	2011-11-18 22:35:56 +01:00
GliGli	ecb3017bd6	bugfixes & optis	2011-11-18 20:45:25 +01:00
GliGli	51109bb3cb	misc changes	2011-11-17 20:12:13 +01:00
GliGli	01c0ddef4c	working dr blocks invalidation	2011-11-13 00:33:25 +01:00
GliGli	442fd87ee9	working shil CE optimiser	2011-11-12 15:29:51 +01:00
GliGli	8eae90dd62	wip	2011-11-11 19:17:58 +01:00
GliGli	d7a740913b	misc dynarec shift stuff	2011-11-10 00:28:53 +01:00
GliGli	3b0341ef40	dynarec load/store opti	2011-11-09 23:28:41 +01:00
GliGli	227d2d5d1b	misc dynarec optis	2011-11-09 14:52:18 +01:00
GliGli	8a627e5efd	round of optimisations	2011-11-09 10:21:52 +01:00
GliGli	f8166927a4	more remcompiled FPU ops	2011-11-08 19:55:17 +01:00
GliGli	f3c0b7eb7a	opti: use CR bit to emulate T flag	2011-11-08 16:47:29 +01:00